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authorNick Lewycky <nicholas@mxc.ca>2010-09-29 18:56:57 +0000
committerNick Lewycky <nicholas@mxc.ca>2010-09-29 18:56:57 +0000
commit23ebf4b319e91ba8c425d56b31fc288fbf3c5844 (patch)
tree707473aed1ca2d0f899e1e35853ed553649f4905 /llvm/lib
parentcfd405fb4214e2d53b413a10c84ba8deb20ef6a8 (diff)
downloadbcm5719-llvm-23ebf4b319e91ba8c425d56b31fc288fbf3c5844.tar.gz
bcm5719-llvm-23ebf4b319e91ba8c425d56b31fc288fbf3c5844.zip
Add parens to fix GCC warning:
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||' llvm-svn: 115064
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86MCCodeEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
index e9ce02f1ff7..3b82a5d32cb 100644
--- a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -186,8 +186,8 @@ static bool Is32BitMemOperand(const MCInst &MI, unsigned Op) {
const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg);
const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
- if (BaseReg.getReg() != 0 && X86::GR32RegClass.contains(BaseReg.getReg()) ||
- IndexReg.getReg() != 0 && X86::GR32RegClass.contains(IndexReg.getReg()))
+ if ((BaseReg.getReg() != 0 && X86::GR32RegClass.contains(BaseReg.getReg())) ||
+ (IndexReg.getReg() != 0 && X86::GR32RegClass.contains(IndexReg.getReg())))
return true;
return false;
}
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