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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-16 14:01:01 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-16 14:01:01 +0000 |
commit | 23578e7d3cb0bff9d4b29d3bab1c75a03b101cfd (patch) | |
tree | c2f4a3ce03bc2bfc4aeae9c52b18e289b46879bc /llvm/lib | |
parent | 8d28ae6aec26cb3fec9bee5c56462962eb62ffaf (diff) | |
download | bcm5719-llvm-23578e7d3cb0bff9d4b29d3bab1c75a03b101cfd.tar.gz bcm5719-llvm-23578e7d3cb0bff9d4b29d3bab1c75a03b101cfd.zip |
[X86][Btver2] Add correct mul/imul schedule costs
Integer multiply is performed on the JMul function unit and i64 requires double pumping
llvm-svn: 327707
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ScheduleBtVer2.td | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 88a85609fbd..58c67e63180 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -117,7 +117,7 @@ def : WriteRes<WriteRMW, [JSAGU]>; //////////////////////////////////////////////////////////////////////////////// defm : JWriteResIntPair<WriteALU, [JALU01], 1>; -defm : JWriteResIntPair<WriteIMul, [JALU1], 3>; +defm : JWriteResIntPair<WriteIMul, [JALU1, JMul], 3, [1, 1], 2>; // i8/i16/i32 multiplication defm : JWriteResIntPair<WriteIDiv, [JALU1, JDiv], 41, [1, 41], 2>; // Worst case (i64 division) def : WriteRes<WriteIMulH, [JALU1]> { @@ -152,6 +152,19 @@ def JWriteTZCNTLd : SchedWriteRes<[JLAGU, JALU01]> { def : InstRW<[JWriteTZCNT], (instrs TZCNT16rr, TZCNT32rr, TZCNT64rr)>; def : InstRW<[JWriteTZCNTLd], (instrs TZCNT16rm, TZCNT32rm, TZCNT64rm)>; +def JWriteIMul64 : SchedWriteRes<[JALU1, JMul]> { + let Latency = 6; + let ResourceCycles = [1, 4]; + let NumMicroOps = 2; +} +def JWriteIMul64Ld : SchedWriteRes<[JLAGU, JALU1, JMul]> { + let Latency = 9; + let ResourceCycles = [1, 1, 4]; + let NumMicroOps = 2; +} +def : InstRW<[JWriteIMul64], (instrs MUL64r, IMUL64r)>; +def : InstRW<[JWriteIMul64Ld], (instrs MUL64m, IMUL64m)>; + def JWriteIDiv8 : SchedWriteRes<[JALU1, JDiv]> { let Latency = 12; let ResourceCycles = [1, 12]; |