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authorJustin Hibbits <jrh29@alumni.cwru.edu>2018-07-18 05:19:25 +0000
committerJustin Hibbits <jrh29@alumni.cwru.edu>2018-07-18 05:19:25 +0000
commit22e939a15b6d585da0f422ba82ff9ba155779208 (patch)
treec32f570703c1499fbf54e2fbd112b27e791faca6 /llvm/lib
parent95063a45b84a330d6ee378256593c244f89df9d3 (diff)
downloadbcm5719-llvm-22e939a15b6d585da0f422ba82ff9ba155779208.tar.gz
bcm5719-llvm-22e939a15b6d585da0f422ba82ff9ba155779208.zip
Fix build failures from r337347, found by clang
* Delete a no-longer-used override, and mark the other getRegisterTypeForCallingConv() as override. * SPE only supports i32, not i64, as the internal type, so simply remove the type check, so that DestReg and Opc are provably always set. GCC 6.4 did not warn about either of the above. llvm-svn: 337350
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/PPCFastISel.cpp12
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp6
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.h3
3 files changed, 6 insertions, 15 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
index 19d94137400..b00655b5022 100644
--- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
@@ -1223,13 +1223,11 @@ bool PPCFastISel::SelectFPToI(const Instruction *I, bool IsSigned) {
unsigned Opc;
if (PPCSubTarget->hasSPE()) {
- if (DstVT == MVT::i32) {
- DestReg = createResultReg(&PPC::GPRCRegClass);
- if (IsSigned)
- Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
- else
- Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
- }
+ DestReg = createResultReg(&PPC::GPRCRegClass);
+ if (IsSigned)
+ Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
+ else
+ Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
} else {
DestReg = createResultReg(&PPC::F8RCRegClass);
if (DstVT == MVT::i32)
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 48355494afe..1e3e14c7114 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1237,12 +1237,6 @@ MVT PPCTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
return PPCTargetLowering::getRegisterType(Context, VT);
}
-MVT PPCTargetLowering::getRegisterTypeForCallingConv(MVT VT) const {
- if (Subtarget.hasSPE() && VT == MVT::f64)
- return MVT::i32;
- return PPCTargetLowering::getRegisterType(VT);
-}
-
bool PPCTargetLowering::useSoftFloat() const {
return Subtarget.useSoftFloat();
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 11b974e42a0..9b8d6435515 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -874,9 +874,8 @@ namespace llvm {
unsigned getNumRegistersForCallingConv(LLVMContext &Context,
EVT VT) const override;
- MVT getRegisterTypeForCallingConv(MVT VT) const;
MVT getRegisterTypeForCallingConv(LLVMContext &Context,
- EVT VT) const;
+ EVT VT) const override;
private:
struct ReuseLoadInfo {
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