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authorHal Finkel <hfinkel@anl.gov>2013-04-12 18:17:38 +0000
committerHal Finkel <hfinkel@anl.gov>2013-04-12 18:17:38 +0000
commit2277196f6465cc3036090572ac5df7487053e4df (patch)
treeb3b83ca5d40b799d504ffcab0acb28653b583ba9 /llvm/lib
parent35005f768e4a0b8d9c890e960a492e73b5fbc5ad (diff)
downloadbcm5719-llvm-2277196f6465cc3036090572ac5df7487053e4df.tar.gz
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Add a comment about the PPC Interpretation64Bit bit
llvm-svn: 179391
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrFormats.td5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
index 37e26726f76..36f193be993 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
@@ -38,6 +38,11 @@ class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
// Fields used for relation models.
string BaseName = "";
+
+ // For cases where multiple instruction definitions really represent the
+ // same underlying instruction but with one definition for 64-bit arguments
+ // and one for 32-bit arguments, this bit breaks the degeneracy between
+ // the two forms and allows TableGen to generate mapping tables.
bit Interpretation64Bit = 0;
}
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