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authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-06-20 22:41:17 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-06-20 22:41:17 +0000
commit225b2e37a0bd725f6c17f447f98811fd4444933e (patch)
tree026354d7617687dbfb79752115898f8bb4e9abfb /llvm/lib
parent61ddbdcd02ac5180245e26d5163cce1cdeba853e (diff)
downloadbcm5719-llvm-225b2e37a0bd725f6c17f447f98811fd4444933e.tar.gz
bcm5719-llvm-225b2e37a0bd725f6c17f447f98811fd4444933e.zip
[X86][X87] Fix issue with sitofp i64 -> fp128 on 32-bit targets
Fix for PR27726 - sitofp i64 to fp128 was loading the merged load i64 to a x87 register preventing legalization for conversion to fp128. Added 32-bit tests for fp128 cast/conversions. llvm-svn: 273210
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b23c2eb5d41..0a50d511b70 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -30035,8 +30035,8 @@ static SDValue combineSIntToFP(SDNode *N, SelectionDAG &DAG,
LoadSDNode *Ld = cast<LoadSDNode>(Op0.getNode());
EVT LdVT = Ld->getValueType(0);
- // This transformation is not supported if the result type is f16
- if (VT == MVT::f16)
+ // This transformation is not supported if the result type is f16 or f128.
+ if (VT == MVT::f16 || VT == MVT::f128)
return SDValue();
if (!Ld->isVolatile() && !VT.isVector() &&
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