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| author | Evan Cheng <evan.cheng@apple.com> | 2011-07-13 01:33:00 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-13 01:33:00 +0000 |
| commit | 21e90519227c1099f082f763087f32cf7be76e5f (patch) | |
| tree | 383e6cca5e8744294b2c2bb197a6d6ba75539490 /llvm/lib | |
| parent | 1021b4a9ddef0e56b2117467353e934245bfe420 (diff) | |
| download | bcm5719-llvm-21e90519227c1099f082f763087f32cf7be76e5f.tar.gz bcm5719-llvm-21e90519227c1099f082f763087f32cf7be76e5f.zip | |
Add an entry.
llvm-svn: 135024
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/README.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/README.txt b/llvm/lib/Target/ARM/README.txt index 8ba9a27e95c..2f6842e8cb6 100644 --- a/llvm/lib/Target/ARM/README.txt +++ b/llvm/lib/Target/ARM/README.txt @@ -681,3 +681,21 @@ is compiled and optimized to: str r1, [r0] //===---------------------------------------------------------------------===// + +Improve codegen for select's: +if (x != 0) x = 1 +if (x == 1) x = 1 + +ARM codegen used to look like this: + mov r1, r0 + cmp r1, #1 + mov r0, #0 + moveq r0, #1 + +The naive lowering select between two different values. It should recognize the +test is equality test so it's more a conditional move rather than a select: + cmp r0, #1 + movne r0, #0 + +Currently this is a ARM specific dag combine. We probably should make it into a +target-neutral one. |
