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| author | Jan Vesely <jan.vesely@rutgers.edu> | 2016-12-23 15:34:51 +0000 |
|---|---|---|
| committer | Jan Vesely <jan.vesely@rutgers.edu> | 2016-12-23 15:34:51 +0000 |
| commit | 206a510e5406fcab172b15a11cea64b65c953823 (patch) | |
| tree | 736b8b535a7c3c5d6cae7b723bed0cbbe44c9884 /llvm/lib | |
| parent | bbd853632185a6e3154137ce5776dc72ebd3bd2a (diff) | |
| download | bcm5719-llvm-206a510e5406fcab172b15a11cea64b65c953823.tar.gz bcm5719-llvm-206a510e5406fcab172b15a11cea64b65c953823.zip | |
AMDGPU: split ret/noret patterns for global atomics
Differential Revision: https://reviews.llvm.org/D27989
llvm-svn: 290435
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 66 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/FLATInstructions.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.td | 4 |
3 files changed, 52 insertions, 22 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td index c49866da5d3..513df3a9cdf 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td @@ -363,24 +363,54 @@ multiclass AtomicCmpSwapLocal <SDNode cmp_swap_node> { defm atomic_cmp_swap : AtomicCmpSwapLocal <atomic_cmp_swap>; -class global_binary_atomic_op<SDNode atomic_op> : PatFrag< - (ops node:$ptr, node:$value), - (atomic_op node:$ptr, node:$value), - [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}] ->; - -def atomic_swap_global : global_binary_atomic_op<atomic_swap>; -def atomic_add_global : global_binary_atomic_op<atomic_load_add>; -def atomic_and_global : global_binary_atomic_op<atomic_load_and>; -def atomic_max_global : global_binary_atomic_op<atomic_load_max>; -def atomic_min_global : global_binary_atomic_op<atomic_load_min>; -def atomic_or_global : global_binary_atomic_op<atomic_load_or>; -def atomic_sub_global : global_binary_atomic_op<atomic_load_sub>; -def atomic_umax_global : global_binary_atomic_op<atomic_load_umax>; -def atomic_umin_global : global_binary_atomic_op<atomic_load_umin>; -def atomic_xor_global : global_binary_atomic_op<atomic_load_xor>; - -def atomic_cmp_swap_global : global_binary_atomic_op<AMDGPUatomic_cmp_swap>; +multiclass global_binary_atomic_op<SDNode atomic_op> { + def "" : PatFrag< + (ops node:$ptr, node:$value), + (atomic_op node:$ptr, node:$value), + [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]>; + + def _noret : PatFrag< + (ops node:$ptr, node:$value), + (atomic_op node:$ptr, node:$value), + [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (SDValue(N, 0).use_empty());}]>; + + def _ret : PatFrag< + (ops node:$ptr, node:$value), + (atomic_op node:$ptr, node:$value), + [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (!SDValue(N, 0).use_empty());}]>; +} + +defm atomic_swap_global : global_binary_atomic_op<atomic_swap>; +defm atomic_add_global : global_binary_atomic_op<atomic_load_add>; +defm atomic_and_global : global_binary_atomic_op<atomic_load_and>; +defm atomic_max_global : global_binary_atomic_op<atomic_load_max>; +defm atomic_min_global : global_binary_atomic_op<atomic_load_min>; +defm atomic_or_global : global_binary_atomic_op<atomic_load_or>; +defm atomic_sub_global : global_binary_atomic_op<atomic_load_sub>; +defm atomic_umax_global : global_binary_atomic_op<atomic_load_umax>; +defm atomic_umin_global : global_binary_atomic_op<atomic_load_umin>; +defm atomic_xor_global : global_binary_atomic_op<atomic_load_xor>; + +//legacy +def AMDGPUatomic_cmp_swap_global : PatFrag< + (ops node:$ptr, node:$value), + (AMDGPUatomic_cmp_swap node:$ptr, node:$value), + [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]>; + +def atomic_cmp_swap_global : PatFrag< + (ops node:$ptr, node:$cmp, node:$value), + (atomic_cmp_swap node:$ptr, node:$cmp, node:$value), + [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]>; + +def atomic_cmp_swap_global_noret : PatFrag< + (ops node:$ptr, node:$cmp, node:$value), + (atomic_cmp_swap node:$ptr, node:$cmp, node:$value), + [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (SDValue(N, 0).use_empty());}]>; + +def atomic_cmp_swap_global_ret : PatFrag< + (ops node:$ptr, node:$cmp, node:$value), + (atomic_cmp_swap node:$ptr, node:$cmp, node:$value), + [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (!SDValue(N, 0).use_empty());}]>; //===----------------------------------------------------------------------===// // Misc Pattern Fragments diff --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td index a46970b1fca..849fb8ad50f 100644 --- a/llvm/lib/Target/AMDGPU/FLATInstructions.td +++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td @@ -372,7 +372,7 @@ def : FlatAtomicPat <FLAT_ATOMIC_SMIN_RTN, atomic_min_global, i32>; def : FlatAtomicPat <FLAT_ATOMIC_UMIN_RTN, atomic_umin_global, i32>; def : FlatAtomicPat <FLAT_ATOMIC_OR_RTN, atomic_or_global, i32>; def : FlatAtomicPat <FLAT_ATOMIC_SWAP_RTN, atomic_swap_global, i32>; -def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_RTN, atomic_cmp_swap_global, i32, v2i32>; +def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_RTN, AMDGPUatomic_cmp_swap_global, i32, v2i32>; def : FlatAtomicPat <FLAT_ATOMIC_XOR_RTN, atomic_xor_global, i32>; def : FlatAtomicPat <FLAT_ATOMIC_ADD_X2_RTN, atomic_add_global, i64>; @@ -386,7 +386,7 @@ def : FlatAtomicPat <FLAT_ATOMIC_SMIN_X2_RTN, atomic_min_global, i64>; def : FlatAtomicPat <FLAT_ATOMIC_UMIN_X2_RTN, atomic_umin_global, i64>; def : FlatAtomicPat <FLAT_ATOMIC_OR_X2_RTN, atomic_or_global, i64>; def : FlatAtomicPat <FLAT_ATOMIC_SWAP_X2_RTN, atomic_swap_global, i64>; -def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_X2_RTN, atomic_cmp_swap_global, i64, v2i64>; +def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_X2_RTN, AMDGPUatomic_cmp_swap_global, i64, v2i64>; def : FlatAtomicPat <FLAT_ATOMIC_XOR_X2_RTN, atomic_xor_global, i64>; } // End Predicates = [isCIVI] diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 7fb3f42a8a6..0b57085dd38 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -94,8 +94,8 @@ def SIpc_add_rel_offset : SDNode<"AMDGPUISD::PC_ADD_REL_OFFSET", // PatFrags for global memory operations //===----------------------------------------------------------------------===// -def atomic_inc_global : global_binary_atomic_op<SIatomic_inc>; -def atomic_dec_global : global_binary_atomic_op<SIatomic_dec>; +defm atomic_inc_global : global_binary_atomic_op<SIatomic_inc>; +defm atomic_dec_global : global_binary_atomic_op<SIatomic_dec>; //===----------------------------------------------------------------------===// // SDNodes and PatFrag for local loads and stores to enable s_mov_b32 m0, -1 |

