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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-03 13:55:41 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-03 13:55:41 +0000 |
| commit | 1f59076196f6f8d66ef0bf643b2a1a242e4ebab2 (patch) | |
| tree | 98e1dcda6e88e0b733f65b2722d3c55df6a7e2b6 /llvm/lib | |
| parent | 68f438a036369902b14d57cf9aa110ccfb9ea36d (diff) | |
| download | bcm5719-llvm-1f59076196f6f8d66ef0bf643b2a1a242e4ebab2.tar.gz bcm5719-llvm-1f59076196f6f8d66ef0bf643b2a1a242e4ebab2.zip | |
[X86][AVX512] Add support for VPERM/VSHUF masked shuffle comments
llvm-svn: 274462
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp index 393ae3c0e1d..fbf26211749 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp +++ b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp @@ -90,6 +90,16 @@ using namespace llvm; CASE_AVX_INS_COMMON(Inst, Y, suf) \ CASE_SSE_INS_COMMON(Inst, suf) +#define CASE_MASK_SHUF(Inst, src) \ + CASE_MASK_INS_COMMON(Inst, Z, r##src##i) \ + CASE_MASK_INS_COMMON(Inst, Z256, r##src##i) \ + CASE_MASK_INS_COMMON(Inst, Z128, r##src##i) + +#define CASE_MASKZ_SHUF(Inst, src) \ + CASE_MASKZ_INS_COMMON(Inst, Z, r##src##i) \ + CASE_MASKZ_INS_COMMON(Inst, Z256, r##src##i) \ + CASE_MASKZ_INS_COMMON(Inst, Z128, r##src##i) + #define CASE_VPERM(Inst, src) \ CASE_AVX512_INS_COMMON(Inst, Z, src##i) \ CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \ @@ -97,12 +107,34 @@ using namespace llvm; CASE_AVX_INS_COMMON(Inst, , src##i) \ CASE_AVX_INS_COMMON(Inst, Y, src##i) +#define CASE_MASK_VPERM(Inst, src) \ + CASE_MASK_INS_COMMON(Inst, Z, src##i) \ + CASE_MASK_INS_COMMON(Inst, Z256, src##i) \ + CASE_MASK_INS_COMMON(Inst, Z128, src##i) + +#define CASE_MASKZ_VPERM(Inst, src) \ + CASE_MASKZ_INS_COMMON(Inst, Z, src##i) \ + CASE_MASKZ_INS_COMMON(Inst, Z256, src##i) \ + CASE_MASKZ_INS_COMMON(Inst, Z128, src##i) + #define CASE_VSHUF(Inst, src) \ CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ CASE_AVX512_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ CASE_AVX512_INS_COMMON(SHUFI##Inst, Z256, r##src##i) +#define CASE_MASK_VSHUF(Inst, src) \ + CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ + CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ + CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ + CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i) + +#define CASE_MASKZ_VSHUF(Inst, src) \ + CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ + CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ + CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ + CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z256, r##src##i) + static unsigned getVectorRegSize(unsigned RegNo) { if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31) return 512; @@ -178,6 +210,18 @@ static std::string getMaskName(const MCInst *MI, const char *DestName, CASE_MASKZ_PMOVZX(PMOVZXWD, r) CASE_MASKZ_PMOVZX(PMOVZXWQ, m) CASE_MASKZ_PMOVZX(PMOVZXWQ, r) + CASE_MASKZ_SHUF(SHUFPD, m) + CASE_MASKZ_SHUF(SHUFPD, r) + CASE_MASKZ_SHUF(SHUFPS, m) + CASE_MASKZ_SHUF(SHUFPS, r) + CASE_MASKZ_VPERM(PERMILPD, m) + CASE_MASKZ_VPERM(PERMILPD, r) + CASE_MASKZ_VPERM(PERMILPS, m) + CASE_MASKZ_VPERM(PERMILPS, r) + CASE_MASKZ_VSHUF(64X2, m) + CASE_MASKZ_VSHUF(64X2, r) + CASE_MASKZ_VSHUF(32X4, m) + CASE_MASKZ_VSHUF(32X4, r) MaskWithZero = true; MaskRegName = getRegName(MI->getOperand(1).getReg()); break; @@ -199,6 +243,18 @@ static std::string getMaskName(const MCInst *MI, const char *DestName, CASE_MASK_PMOVZX(PMOVZXWD, r) CASE_MASK_PMOVZX(PMOVZXWQ, m) CASE_MASK_PMOVZX(PMOVZXWQ, r) + CASE_MASK_SHUF(SHUFPD, m) + CASE_MASK_SHUF(SHUFPD, r) + CASE_MASK_SHUF(SHUFPS, m) + CASE_MASK_SHUF(SHUFPS, r) + CASE_MASK_VPERM(PERMILPD, m) + CASE_MASK_VPERM(PERMILPD, r) + CASE_MASK_VPERM(PERMILPS, m) + CASE_MASK_VPERM(PERMILPS, r) + CASE_MASK_VSHUF(64X2, m) + CASE_MASK_VSHUF(64X2, r) + CASE_MASK_VSHUF(32X4, m) + CASE_MASK_VSHUF(32X4, r) MaskRegName = getRegName(MI->getOperand(2).getReg()); break; } |
