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| author | Chad Rosier <mcrosier@codeaurora.org> | 2015-10-02 16:42:59 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@codeaurora.org> | 2015-10-02 16:42:59 +0000 |
| commit | 1f385618c018b57fd0c32e125954c4dc32dfb936 (patch) | |
| tree | 752aa0036401a017f0118d7b1feb8babcf1f8419 /llvm/lib | |
| parent | ad3f6686ab2e74b81f73bf230db3e0b072582c50 (diff) | |
| download | bcm5719-llvm-1f385618c018b57fd0c32e125954c4dc32dfb936.tar.gz bcm5719-llvm-1f385618c018b57fd0c32e125954c4dc32dfb936.zip | |
[ARM] Typo. NFC.
llvm-svn: 249153
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index f27c3266138..def47393a47 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -7506,7 +7506,7 @@ static SDValue performIntToFpCombine(SDNode *N, SelectionDAG &DAG, // If the result of an integer load is only used by an integer-to-float // conversion, use a fp load instead and a AdvSIMD scalar {S|U}CVTF instead. - // This eliminates an "integer-to-vector-move UOP and improve throughput. + // This eliminates an "integer-to-vector-move" UOP and improves throughput. SDValue N0 = N->getOperand(0); if (Subtarget->hasNEON() && ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse() && // Do not change the width of a volatile load. |
