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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-10-01 02:02:46 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-10-01 02:02:46 +0000 |
| commit | 1f0e7bbc5b837bb7616da271691a57486d69624b (patch) | |
| tree | 1e278c10c20537c2ef1c2a06d7a7581f7a8f27b5 /llvm/lib | |
| parent | 3c55f2cd96aa0c1a8848c043a9e9680b7de804a3 (diff) | |
| download | bcm5719-llvm-1f0e7bbc5b837bb7616da271691a57486d69624b.tar.gz bcm5719-llvm-1f0e7bbc5b837bb7616da271691a57486d69624b.zip | |
AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D12451
llvm-svn: 248978
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h index c59c0147e8a..3458cec0923 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h @@ -90,15 +90,18 @@ public: bool opCanUseInlineConstant(unsigned OpType) const; enum PreloadedValue { - TGID_X, - TGID_Y, - TGID_Z, - SCRATCH_WAVE_OFFSET, - SCRATCH_PTR, - INPUT_PTR, - TIDIG_X, - TIDIG_Y, - TIDIG_Z + // SGPRS: + SCRATCH_PTR = 0, + INPUT_PTR = 3, + TGID_X = 10, + TGID_Y = 11, + TGID_Z = 12, + SCRATCH_WAVE_OFFSET = 14, + // VGPRS: + FIRST_VGPR_VALUE = 15, + TIDIG_X = FIRST_VGPR_VALUE, + TIDIG_Y = 16, + TIDIG_Z = 17, }; /// \brief Returns the physical register that \p Value is stored in. |
