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authorChris Lattner <sabre@nondot.org>2011-05-17 07:22:33 +0000
committerChris Lattner <sabre@nondot.org>2011-05-17 07:22:33 +0000
commit1e81f57bf0d3f52c990a54b70b5404e240b1fe89 (patch)
tree6b564942b7a908dd3557d7597b9f9ce3753a7c51 /llvm/lib
parente6a9e439d451fa1741235e157591a7eb7b91a5e7 (diff)
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llvm-svn: 131455
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/README.txt26
1 files changed, 26 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/README.txt b/llvm/lib/Target/X86/README.txt
index ea3014e7b92..560947a4a04 100644
--- a/llvm/lib/Target/X86/README.txt
+++ b/llvm/lib/Target/X86/README.txt
@@ -2040,3 +2040,29 @@ _clamp2: ## @clamp2
The move of 0 could be scheduled above the test to make it is xor reg,reg.
//===---------------------------------------------------------------------===//
+
+GCC PR48986. We currently compile this:
+
+void bar(void);
+void yyy(int* p) {
+ if (__sync_fetch_and_add(p, -1) == 1)
+ bar();
+}
+
+into:
+ movl $-1, %eax
+ lock
+ xaddl %eax, (%rdi)
+ cmpl $1, %eax
+ je LBB0_2
+
+Instead we could generate:
+
+ lock
+ dec %rdi
+ je LBB0_2
+
+The trick is to match "fetch_and_add(X, -C) == C".
+
+//===---------------------------------------------------------------------===//
+
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