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authorOliver Stannard <oliver.stannard@arm.com>2017-11-21 15:34:15 +0000
committerOliver Stannard <oliver.stannard@arm.com>2017-11-21 15:34:15 +0000
commit1e6d4b9e6262f5c9a4ed9c13af2d888e29d06a39 (patch)
treebe9b9fb4e8a6fd7ad4aaaec38872c94f0eb4c541 /llvm/lib
parent1e73e95f3c82fcfdd9cd817d0b5989b697e4b05d (diff)
downloadbcm5719-llvm-1e6d4b9e6262f5c9a4ed9c13af2d888e29d06a39.tar.gz
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[ARM] Don't omit non-default predication code
This was causing the (invalid) predicated versions of the NEON VRINTX and VRINTZ instructions to be accepted, with the condition code being ignored. Also, there is no NEON VRINTR instruction, so that part of the check was not necessary. Differential revision: https://reviews.llvm.org/D39193 llvm-svn: 318771
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 2690eed45cd..6974c32d9b7 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5804,9 +5804,9 @@ bool ARMAsmParser::shouldOmitCCOutOperand(StringRef Mnemonic,
bool ARMAsmParser::shouldOmitPredicateOperand(StringRef Mnemonic,
OperandVector &Operands) {
- // VRINT{Z, R, X} have a predicate operand in VFP, but not in NEON
+ // VRINT{Z, X} have a predicate operand in VFP, but not in NEON
unsigned RegIdx = 3;
- if ((Mnemonic == "vrintz" || Mnemonic == "vrintx" || Mnemonic == "vrintr") &&
+ if ((Mnemonic == "vrintz" || Mnemonic == "vrintx") &&
(static_cast<ARMOperand &>(*Operands[2]).getToken() == ".f32" ||
static_cast<ARMOperand &>(*Operands[2]).getToken() == ".f16")) {
if (static_cast<ARMOperand &>(*Operands[3]).isToken() &&
@@ -6100,7 +6100,8 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
// Some instructions have the same mnemonic, but don't always
// have a predicate. Distinguish them here and delete the
// predicate if needed.
- if (shouldOmitPredicateOperand(Mnemonic, Operands))
+ if (PredicationCode == ARMCC::AL &&
+ shouldOmitPredicateOperand(Mnemonic, Operands))
Operands.erase(Operands.begin() + 1);
// ARM mode 'blx' need special handling, as the register operand version
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