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| author | Changpeng Fang <changpeng.fang@gmail.com> | 2019-10-25 13:08:04 -0700 | 
|---|---|---|
| committer | Changpeng Fang <changpeng.fang@gmail.com> | 2019-10-25 13:08:04 -0700 | 
| commit | 1ce552f3ef8d6455c10a9886191c1898594975e0 (patch) | |
| tree | bf1ebda1ea088ab89d3a36c0ddfceaf2dc2a247e /llvm/lib | |
| parent | a6e1de4afc51560df18c95cb616dec51248ed660 (diff) | |
| download | bcm5719-llvm-1ce552f3ef8d6455c10a9886191c1898594975e0.tar.gz bcm5719-llvm-1ce552f3ef8d6455c10a9886191c1898594975e0.zip | |
AMDGPU: Fix the broken dominator tree when creating waterfall loop for resource descriptor
Summary:
  In loadSRsrcFromVGPR, if MBB is the same as Succ, Remiander is not the immediate dominator of Succ.
Reviewer:
  arsenm
Differential Revision:
  https://reviews.llvm.org/D69358
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 | 
1 files changed, 2 insertions, 2 deletions
| diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index d97e6a62971..6e914330542 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -4451,12 +4451,12 @@ static void loadSRsrcFromVGPR(const SIInstrInfo &TII, MachineInstr &MI,    // Update dominators. We know that MBB immediately dominates LoopBB, that    // LoopBB immediately dominates RemainderBB, and that RemainderBB immediately    // dominates all of the successors transferred to it from MBB that MBB used -  // to dominate. +  // to properly dominate.    if (MDT) {      MDT->addNewBlock(LoopBB, &MBB);      MDT->addNewBlock(RemainderBB, LoopBB);      for (auto &Succ : RemainderBB->successors()) { -      if (MDT->dominates(&MBB, Succ)) { +      if (MDT->properlyDominates(&MBB, Succ)) {          MDT->changeImmediateDominator(Succ, RemainderBB);        }      } | 

