Revert "[ARM][LowOverheadLoops] Update liveness info"

This reverts commit e93e0d413f3afa1df5c5f88df546bebcd1183155.

There's some ordering problems on some on the buildbots which needs
investigating.

2 files changed, 0 insertions, 77 deletions

diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index 547970e7ab5..7a5cffca347 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -276,7 +276,6 @@ void llvm::recomputeLivenessFlags(MachineBasicBlock &MBB) {
   const MachineFunction &MF = *MBB.getParent();
   const MachineRegisterInfo &MRI = MF.getRegInfo();
   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
-  const MachineFrameInfo &MFI = MF.getFrameInfo();
 
   // We walk through the block backwards and start with the live outs.
   LivePhysRegs LiveRegs;
@@ -295,18 +294,6 @@ void llvm::recomputeLivenessFlags(MachineBasicBlock &MBB) {
       assert(Register::isPhysicalRegister(Reg));
 
       bool IsNotLive = LiveRegs.available(MRI, Reg);
-
-      // Special-case return instructions for cases when a return is not
-      // the last instruction in the block.
-      if (MI.isReturn() && MFI.isCalleeSavedInfoValid()) {
-        for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo()) {
-          if (Info.getReg() == Reg) {
-            IsNotLive = !Info.isRestored();
-            break;
-          }
-        }
-      }
-
       MO->setIsDead(IsNotLive);
     }
 
diff --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index d8b6a0e47d0..31a98d86a54 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -43,61 +43,6 @@ using namespace llvm;
 
 namespace {
 
-  class PostOrderLoopTraversal {
-    MachineLoop &ML;
-    MachineLoopInfo &MLI;
-    SmallPtrSet<MachineBasicBlock*, 4> Visited;
-    SmallVector<MachineBasicBlock*, 4> Order;
-
-  public:
-    PostOrderLoopTraversal(MachineLoop &ML, MachineLoopInfo &MLI)
-      : ML(ML), MLI(MLI) { }
-
-    const SmallVectorImpl<MachineBasicBlock*> &getOrder() const {
-      return Order;
-    }
-
-    // Visit all the blocks within the loop, as well as exit blocks and any
-    // blocks properly dominating the header.
-    void ProcessLoop() {
-      std::function<void(MachineBasicBlock*)> Search = [this, &Search]
-        (MachineBasicBlock *MBB) -> void {
-        if (Visited.count(MBB))
-          return;
-
-        Visited.insert(MBB);
-        for (auto *Succ : MBB->successors()) {
-          if (!ML.contains(Succ))
-            continue;
-          Search(Succ);
-        }
-        Order.push_back(MBB);
-      };
-
-      // Insert exit blocks.
-      SmallVector<MachineBasicBlock*, 2> ExitBlocks;
-      ML.getExitBlocks(ExitBlocks);
-      for (auto *MBB : ExitBlocks)
-        Order.push_back(MBB);
-
-      // Then add the loop body.
-      Search(ML.getHeader());
-
-      // Then try the preheader and its predecessors.
-      std::function<void(MachineBasicBlock*)> GetPredecessor =
-        [this, &GetPredecessor] (MachineBasicBlock *MBB) -> void {
-        Order.push_back(MBB);
-        if (MBB->pred_size() == 1)
-          GetPredecessor(*MBB->pred_begin());
-      };
-
-      if (auto *Preheader = ML.getLoopPreheader())
-        GetPredecessor(Preheader);
-      else if (auto *Preheader = MLI.findLoopPreheader(&ML, true))
-        GetPredecessor(Preheader);
-    }
-  };
-
   struct PredicatedMI {
     MachineInstr *MI = nullptr;
     SetVector<MachineInstr*> Predicates;
@@ -1031,15 +976,6 @@ void ARMLowOverheadLoops::Expand(LowOverheadLoop &LoLoop) {
       ConvertVPTBlocks(LoLoop);
     }
   }
-
-  PostOrderLoopTraversal DFS(*LoLoop.ML, *MLI);
-  DFS.ProcessLoop();
-  const SmallVectorImpl<MachineBasicBlock*> &PostOrder = DFS.getOrder();
-  for (auto *MBB : PostOrder)
-    recomputeLiveIns(*MBB);
-
-  for (auto *MBB : reverse(PostOrder))
-    recomputeLivenessFlags(*MBB);
 }
 
 bool ARMLowOverheadLoops::RevertNonLoops() {