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authorMatthias Braun <matze@braunis.de>2017-07-07 03:02:17 +0000
committerMatthias Braun <matze@braunis.de>2017-07-07 03:02:17 +0000
commit1b54aa58798f8e772db25500b0e5a1b95c1beb36 (patch)
treef4d3b9dd6408a6270b1c84b62a1353a53ca381f6 /llvm/lib
parent4ce98662e7d109b4579c35945345db685ae5b3fb (diff)
downloadbcm5719-llvm-1b54aa58798f8e772db25500b0e5a1b95c1beb36.tar.gz
bcm5719-llvm-1b54aa58798f8e772db25500b0e5a1b95c1beb36.zip
LiveRegUnits: Rename accumulateBackward()->accumulate()
Contrary to the stepForward()/stepBackward() method accumulate() doesn't have a direction as defs, uses and clobbers all have the same effect. Also improve the documentation comment. llvm-svn: 307351
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/LiveRegUnits.cpp2
-rw-r--r--llvm/lib/CodeGen/RegisterScavenging.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp2
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/LiveRegUnits.cpp b/llvm/lib/CodeGen/LiveRegUnits.cpp
index 3746b74e052..f9ba4ffa652 100644
--- a/llvm/lib/CodeGen/LiveRegUnits.cpp
+++ b/llvm/lib/CodeGen/LiveRegUnits.cpp
@@ -67,7 +67,7 @@ void LiveRegUnits::stepBackward(const MachineInstr &MI) {
}
}
-void LiveRegUnits::accumulateBackward(const MachineInstr &MI) {
+void LiveRegUnits::accumulate(const MachineInstr &MI) {
// Add defs, uses and regmask clobbers to the set.
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
if (O->isReg()) {
diff --git a/llvm/lib/CodeGen/RegisterScavenging.cpp b/llvm/lib/CodeGen/RegisterScavenging.cpp
index 83d65a56fec..7856eaa0a36 100644
--- a/llvm/lib/CodeGen/RegisterScavenging.cpp
+++ b/llvm/lib/CodeGen/RegisterScavenging.cpp
@@ -388,7 +388,7 @@ findSurvivorBackwards(const MachineRegisterInfo &MRI,
for (MachineBasicBlock::iterator I = From;; --I) {
const MachineInstr &MI = *I;
- Used.accumulateBackward(MI);
+ Used.accumulate(MI);
if (I == To) {
// See if one of the registers in RC wasn't used so far.
diff --git a/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp b/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
index 4a7e0b2b803..db1fbe069f4 100644
--- a/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
+++ b/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
@@ -509,7 +509,7 @@ int AArch64A57FPLoadBalancing::scavengeRegister(Chain *G, Color C,
assert(ChainBegin != ChainEnd && "Chain should contain instructions");
do {
--I;
- Units.accumulateBackward(*I);
+ Units.accumulate(*I);
} while (I != ChainBegin);
// Make sure we allocate in-order, to get the cheapest registers first.
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