diff options
| author | Eric Christopher <echristo@apple.com> | 2010-11-30 08:10:28 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2010-11-30 08:10:28 +0000 |
| commit | 1a86e8461a3339d69a06b9f73176a16e4edb8253 (patch) | |
| tree | 1bf91478f3c1d8a2c48c8c07015260c08fb0bb47 /llvm/lib | |
| parent | c25eb5d0510dcf41b817eb60d89e69163e2b3680 (diff) | |
| download | bcm5719-llvm-1a86e8461a3339d69a06b9f73176a16e4edb8253.tar.gz bcm5719-llvm-1a86e8461a3339d69a06b9f73176a16e4edb8253.zip | |
Fix some cleanups from my last patch.
llvm-svn: 120410
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.h | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index f53b0ed3834..3f245ee378e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -9445,7 +9445,7 @@ X86TargetLowering::EmitPCMP(MachineInstr *MI, MachineBasicBlock *BB, MachineBasicBlock * X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const { - assert((Subtarget->hasSSE3()) && "Target must have SSE3 features enabled"); + assert(Subtarget->hasSSE3() && "Target must have SSE3 features enabled"); DebugLoc dl = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); @@ -9455,7 +9455,7 @@ X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const { unsigned MemReg = Subtarget->is64Bit() ? X86::RAX : X86::EAX; MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(MemOpc), MemReg); for (int i = 0; i < X86::AddrNumOperands; ++i) - (*MIB).addOperand(MI->getOperand(i)); + MIB.addOperand(MI->getOperand(i)); unsigned ValOps = X86::AddrNumOperands; BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::ECX) @@ -9472,7 +9472,7 @@ X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const { MachineBasicBlock * X86TargetLowering::EmitMwait(MachineInstr *MI, MachineBasicBlock *BB) const { - assert((Subtarget->hasSSE3()) && "Target must have SSE3 features enabled"); + assert(Subtarget->hasSSE3() && "Target must have SSE3 features enabled"); DebugLoc dl = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index 6d78d969d33..b5217020136 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -824,8 +824,8 @@ namespace llvm { /// Utility functions to emit monitor and mwait instructions. These /// need to make sure that the arguments to the intrinsic are in the /// correct registers. - MachineBasicBlock *EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) - const; + MachineBasicBlock *EmitMonitor(MachineInstr *MI, + MachineBasicBlock *BB) const; MachineBasicBlock *EmitMwait(MachineInstr *MI, MachineBasicBlock *BB) const; /// Utility function to emit atomic bitwise operations (and, or, xor). |
