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authorMichael Kuperstein <mkuper@google.com>2016-06-17 20:21:17 +0000
committerMichael Kuperstein <mkuper@google.com>2016-06-17 20:21:17 +0000
commit18d6d3d95ef4b172ae753bb11b69f0f78218e0a5 (patch)
treebb93d2d8c8beb9d27fe19e3ae02e471f311f4b91 /llvm/lib
parentd6f2355f25eab6be5fa845590fd7fee21b95b87d (diff)
downloadbcm5719-llvm-18d6d3d95ef4b172ae753bb11b69f0f78218e0a5.tar.gz
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[X86] Add missing AVX512 anyext patterns.
Add AVX512 anyext patterns for i16 and i64, modeled on the existing i8 and i32 patterns. llvm-svn: 273038
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86InstrAVX512.td8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 5bd9dc7a527..4cee6181b84 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -2112,10 +2112,18 @@ let Predicates = [HasAVX512] in {
def : Pat<(i64 (zext VK1:$src)),
(AND64ri8 (SUBREG_TO_REG (i64 0),
(KMOVWrk (COPY_TO_REGCLASS VK1:$src, VK16)), sub_32bit), (i64 1))>;
+ def : Pat<(i64 (anyext VK1:$src)),
+ (SUBREG_TO_REG (i64 0),
+ (KMOVWrk (COPY_TO_REGCLASS VK1:$src, VK16)), sub_32bit)>;
+
def : Pat<(i16 (zext VK1:$src)),
(EXTRACT_SUBREG
(AND32ri8 (KMOVWrk (COPY_TO_REGCLASS VK1:$src, VK16)), (i32 1)),
sub_16bit)>;
+ def : Pat<(i16 (anyext VK1:$src)),
+ (EXTRACT_SUBREG
+ (KMOVWrk (COPY_TO_REGCLASS VK1:$src, VK16)),
+ sub_16bit)>;
}
def : Pat<(v16i1 (scalar_to_vector VK1:$src)),
(COPY_TO_REGCLASS VK1:$src, VK16)>;
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