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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-28 10:26:48 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-28 10:26:48 +0000 |
| commit | 17e5981ebf44e9868fb486d2198166bacfae210f (patch) | |
| tree | 08a3ee71648c2ebea42e02cc073eb1a6f44793b4 /llvm/lib | |
| parent | 8d72ecc36f12252e20bb63e1177a17e99019a6b4 (diff) | |
| download | bcm5719-llvm-17e5981ebf44e9868fb486d2198166bacfae210f.tar.gz bcm5719-llvm-17e5981ebf44e9868fb486d2198166bacfae210f.zip | |
[X86][Btver2] Fix BSF/BSR schedule
Double throughput to account for 2 pipes + fix BSF's latency/uop counts
Match AMD Fam16h SOG + llvm-exegesis tests
llvm-svn: 343311
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleBtVer2.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 364d64b1b4f..578e43c6363 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -208,8 +208,8 @@ defm : X86WriteRes<WriteBitTestSet, [JALU01], 1, [1], 2>; def : WriteRes<WriteLEA, [JALU01]>; // Bit counts. -defm : JWriteResIntPair<WriteBSF, [JALU01], 5, [4], 8>; -defm : JWriteResIntPair<WriteBSR, [JALU01], 5, [4], 8>; +defm : JWriteResIntPair<WriteBSF, [JALU01], 4, [8], 7>; +defm : JWriteResIntPair<WriteBSR, [JALU01], 5, [8], 8>; defm : JWriteResIntPair<WritePOPCNT, [JALU01], 1>; defm : JWriteResIntPair<WriteLZCNT, [JALU01], 1>; defm : JWriteResIntPair<WriteTZCNT, [JALU01], 2, [2], 2>; |
