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authorSimon Dardis <simon.dardis@imgtec.com>2017-03-09 11:19:48 +0000
committerSimon Dardis <simon.dardis@imgtec.com>2017-03-09 11:19:48 +0000
commit158956c6cc77fd2acd1ea5917f7e414ae659a914 (patch)
tree0fd2280a10af93c72ce728ee68c82967aa897d28 /llvm/lib
parent573050e703308c624e48c7f36f19dc2d83d7170f (diff)
downloadbcm5719-llvm-158956c6cc77fd2acd1ea5917f7e414ae659a914.tar.gz
bcm5719-llvm-158956c6cc77fd2acd1ea5917f7e414ae659a914.zip
[mips] Fix return lowering
Fix a machine verifier issue where a instruction was using a invalid register. The return pseudo is expanded and has the return address register added to it. The return register may have been spuriously mark as killed earlier. This partially resolves PR/27458 Thanks to Quentin Colombet for reporting the issue! llvm-svn: 297372
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Mips/MipsSEInstrInfo.cpp15
1 files changed, 12 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
index ea703d0edd9..91e712a7a54 100644
--- a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
@@ -540,11 +540,20 @@ unsigned MipsSEInstrInfo::getAnalyzableBrOpc(unsigned Opc) const {
void MipsSEInstrInfo::expandRetRA(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
+
+ MachineInstrBuilder MIB;
if (Subtarget.isGP64bit())
- BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
- .addReg(Mips::RA_64);
+ MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
+ .addReg(Mips::RA_64, RegState::Undef);
else
- BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn)).addReg(Mips::RA);
+ MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn))
+ .addReg(Mips::RA, RegState::Undef);
+
+ // Retain any imp-use flags.
+ for (auto & MO : I->operands()) {
+ if (MO.isImplicit())
+ MIB.add(MO);
+ }
}
void MipsSEInstrInfo::expandERet(MachineBasicBlock &MBB,
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