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author | Bob Wilson <bob.wilson@apple.com> | 2010-12-17 01:21:05 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2010-12-17 01:21:05 +0000 |
commit | 137dcdba8ad12cce61acb6154063abd72d8b2274 (patch) | |
tree | 0ddeb94668a6ab603df6046ebb0e633c49f2fa8e /llvm/lib | |
parent | def12f3be123d38d03d3884b99130d88dfa7b885 (diff) | |
download | bcm5719-llvm-137dcdba8ad12cce61acb6154063abd72d8b2274.tar.gz bcm5719-llvm-137dcdba8ad12cce61acb6154063abd72d8b2274.zip |
Fix a comment typo.
llvm-svn: 122016
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp index 74e72af3293..993f5feb5f9 100644 --- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -621,8 +621,8 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, return false; } - // If destination register has a sub-register index on it, make sure it mtches - // the instruction register class. + // If destination register has a sub-register index on it, make sure it + // matches the instruction register class. if (DstSubIdx) { const TargetInstrDesc &TID = DefMI->getDesc(); if (TID.getNumDefs() != 1) |