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| author | Jim Grosbach <grosbach@apple.com> | 2010-09-08 00:26:59 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-09-08 00:26:59 +0000 |
| commit | 136d035e45bee162623ba29957742700b66a3c52 (patch) | |
| tree | 4269be8a8f066e352131c8e35bd83099c92266cd /llvm/lib | |
| parent | abcbe2474d167ce68dc529df792cf1e1e41e43df (diff) | |
| download | bcm5719-llvm-136d035e45bee162623ba29957742700b66a3c52.tar.gz bcm5719-llvm-136d035e45bee162623ba29957742700b66a3c52.zip | |
correct spill code to properly determine if dynamic stack realignment is
present in the function and thus whether aligned load/store instructions can
be used.
llvm-svn: 113323
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 79e9a588928..a7edea5dbff 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -748,7 +748,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, case ARM::QPR_VFP2RegClassID: case ARM::QPR_8RegClassID: // FIXME: Neon instructions should support predicates - if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) { + if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) { AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VST1q)) .addFrameIndex(FI).addImm(16) .addReg(SrcReg, getKillRegState(isKill)) @@ -846,7 +846,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, case ARM::QPRRegClassID: case ARM::QPR_VFP2RegClassID: case ARM::QPR_8RegClassID: - if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) { + if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) { AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1q), DestReg) .addFrameIndex(FI).addImm(16) .addMemOperand(MMO)); |
