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authorEvan Cheng <evan.cheng@apple.com>2009-07-28 07:38:35 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-07-28 07:38:35 +0000
commit12da273f902124655d152150c63f0c6be9a6663c (patch)
treef399fc953d6fd0d5899d7e91937d557d349ace8b /llvm/lib
parent1b329eb2bf75d9fe34a29452a36261c0323b6fa3 (diff)
downloadbcm5719-llvm-12da273f902124655d152150c63f0c6be9a6663c.tar.gz
bcm5719-llvm-12da273f902124655d152150c63f0c6be9a6663c.zip
tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
llvm-svn: 77305
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
index bb39b2e6a5a..872f1d3ad7e 100644
--- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
@@ -505,9 +505,14 @@ void Thumb1RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// r0 = -imm (this is then translated into a series of instructons)
// r0 = add r0, sp
emitThumbConstant(MBB, II, DestReg, Offset, TII, *this, dl);
+
MI.setDesc(TII.get(ARM::tADDhirr));
MI.getOperand(i).ChangeToRegister(DestReg, false, false, true);
MI.getOperand(i+1).ChangeToRegister(FrameReg, false);
+ if (Opcode == ARM::tADDi3) {
+ MachineInstrBuilder MIB(&MI);
+ AddDefaultPred(MIB);
+ }
}
return;
} else {
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