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author | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-04-29 14:17:14 +0000 |
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committer | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-04-29 14:17:14 +0000 |
commit | 1249e74648792bd34384aee95a2d1e8aa796b4e1 (patch) | |
tree | c26905d2d83b771b235b5cd2fbcd8f9dd7662b43 /llvm/lib | |
parent | cad91323dc31ee591b2a3cb7333711eb69fb9350 (diff) | |
download | bcm5719-llvm-1249e74648792bd34384aee95a2d1e8aa796b4e1.tar.gz bcm5719-llvm-1249e74648792bd34384aee95a2d1e8aa796b4e1.zip |
Mips fast-isel - handle functions which return i8 or i6 .
Summary: Allow Mips fast-isel to handle functions which return i8/i16 signed/unsigned.
Test Plan:
Make check tests are forthcoming.
Already passes test-suite at O0/O2 for Mips 32 r1/r2
Reviewers: dsanders, rkotler
Subscribers: llvm-commits, rfuhler
Differential Revision: http://reviews.llvm.org/D6765
llvm-svn: 236103
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/Mips/MipsCallingConv.td | 3 | ||||
-rw-r--r-- | llvm/lib/Target/Mips/MipsFastISel.cpp | 17 |
2 files changed, 12 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/MipsCallingConv.td b/llvm/lib/Target/Mips/MipsCallingConv.td index dcd88f25d25..c2e23ffea06 100644 --- a/llvm/lib/Target/Mips/MipsCallingConv.td +++ b/llvm/lib/Target/Mips/MipsCallingConv.td @@ -90,6 +90,9 @@ def CC_MipsO32 : CallingConv<[ // Only the return rules are defined here for O32. The rules for argument // passing are defined in MipsISelLowering.cpp. def RetCC_MipsO32 : CallingConv<[ + // Promote i1/i8/i16 return values to i32. + CCIfType<[i1, i8, i16], CCPromoteToType<i32>>, + // i32 are returned in registers V0, V1, A0, A1 CCIfType<[i32], CCAssignToReg<[V0, V1, A0, A1]>>, diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp index ab44d33cecf..671f7e90b35 100644 --- a/llvm/lib/Target/Mips/MipsFastISel.cpp +++ b/llvm/lib/Target/Mips/MipsFastISel.cpp @@ -1112,6 +1112,8 @@ bool MipsFastISel::finishCall(CallLoweringInfo &CLI, MVT RetVT, CopyVT = MVT::i32; unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); + if (!ResultReg) + return false; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::COPY), ResultReg).addReg(RVLocs[0].getLocReg()); @@ -1142,7 +1144,7 @@ bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) { MVT RetVT; if (CLI.RetTy->isVoidTy()) RetVT = MVT::isVoid; - else if (!isTypeLegal(CLI.RetTy, RetVT)) + else if (!isTypeSupported(CLI.RetTy, RetVT)) return false; for (auto Flag : CLI.OutFlags) @@ -1260,13 +1262,12 @@ bool MipsFastISel::selectRet(const Instruction *I) { if (RVVT != MVT::i1 && RVVT != MVT::i8 && RVVT != MVT::i16) return false; - if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt()) - return false; - - bool IsZExt = Outs[0].Flags.isZExt(); - SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt); - if (SrcReg == 0) - return false; + if (Outs[0].Flags.isZExt() || Outs[0].Flags.isSExt()) { + bool IsZExt = Outs[0].Flags.isZExt(); + SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt); + if (SrcReg == 0) + return false; + } } // Make the copy. |