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author | Eric Christopher <echristo@apple.com> | 2012-05-07 05:46:37 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2012-05-07 05:46:37 +0000 |
commit | 1109b3406d721eff20c0d1eedf3d09db2a7df716 (patch) | |
tree | fa6029e4d201858ad16769513609bbb73a90ccad /llvm/lib | |
parent | 3ff88a05b7eb2bb3902ab4f36d44c121d7f7c6f7 (diff) | |
download | bcm5719-llvm-1109b3406d721eff20c0d1eedf3d09db2a7df716.tar.gz bcm5719-llvm-1109b3406d721eff20c0d1eedf3d09db2a7df716.zip |
Add support for the 'L' inline asm constraint.
Patch by Jack Carter.
llvm-svn: 156283
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index d056f542e70..3f445a0cc8c 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3042,6 +3042,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight( case 'I': // signed 16 bit immediate case 'J': // integer zero case 'K': // unsigned 16 bit immediate + case 'L': // signed 32 bit immediate where lower 16 bits are 0 if (isa<ConstantInt>(CallOperandVal)) weight = CW_Constant; break; @@ -3124,6 +3125,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, } } return; + case 'L': // signed 32 bit immediate where lower 16 bits are 0 + if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { + EVT Type = Op.getValueType(); + int64_t Val = C->getSExtValue(); + if ((isInt<32>(Val)) && ((Val & 0xffff) == 0)){ + Result = DAG.getTargetConstant(Val, Type); + break; + } + } + return; } if (Result.getNode()) { |