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| author | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:55:08 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:55:08 +0000 |
| commit | 0dad74d25265095c604a7c4593d0021ce892f7b4 (patch) | |
| tree | f3b43594f4bd68a5278deecf3acbcab2090006a4 /llvm/lib | |
| parent | 81798417dce42907b668d15356eeb8b791d1a6b5 (diff) | |
| download | bcm5719-llvm-0dad74d25265095c604a7c4593d0021ce892f7b4.tar.gz bcm5719-llvm-0dad74d25265095c604a7c4593d0021ce892f7b4.zip | |
two register machineoperands are not identical unless their subregs match.
llvm-svn: 45455
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index f54cbe7f1c8..e8f692e15f8 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -153,7 +153,8 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const { switch (getType()) { default: assert(0 && "Unrecognized operand type"); case MachineOperand::MO_Register: - return getReg() == Other.getReg() && isDef() == Other.isDef(); + return getReg() == Other.getReg() && isDef() == Other.isDef() && + getSubReg() == Other.getSubReg(); case MachineOperand::MO_Immediate: return getImm() == Other.getImm(); case MachineOperand::MO_MachineBasicBlock: |
