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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-29 00:44:36 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-29 00:44:36 +0000 |
| commit | 0d452097571fe496e70fd7eb16ed328bbf76849c (patch) | |
| tree | acac986fd3c4590fc612374ba24aee59741676dc /llvm/lib | |
| parent | be4148062b155f3be52e0f6ebcb228f2dc137dcf (diff) | |
| download | bcm5719-llvm-0d452097571fe496e70fd7eb16ed328bbf76849c.tar.gz bcm5719-llvm-0d452097571fe496e70fd7eb16ed328bbf76849c.zip | |
AMDGPU/GlobalISel: RegBankSelect for update.dpp
llvm-svn: 364701
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index f244fb12c0d..861c1cee4ac 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -1509,6 +1509,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { return getDefaultMappingVOP(MI); case Intrinsic::amdgcn_ds_permute: case Intrinsic::amdgcn_ds_bpermute: + case Intrinsic::amdgcn_update_dpp: return getDefaultMappingAllVGPR(MI); case Intrinsic::amdgcn_kernarg_segment_ptr: case Intrinsic::amdgcn_s_getpc: |
