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| author | Craig Topper <craig.topper@intel.com> | 2018-04-09 17:07:40 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-09 17:07:40 +0000 |
| commit | 0c2a12cb3e5050ddab2b80fee3dc24b1794904d6 (patch) | |
| tree | 098a22accb175beb23f2cc2f8342ace42f56bb2c /llvm/lib | |
| parent | bb08257cf318d817962f3ceb8deb33f90928a1a7 (diff) | |
| download | bcm5719-llvm-0c2a12cb3e5050ddab2b80fee3dc24b1794904d6.tar.gz bcm5719-llvm-0c2a12cb3e5050ddab2b80fee3dc24b1794904d6.zip | |
[X86] Revert the SLM part of r328914.
While it appears to be correct information based on Intel's optimization manual and Agner's data, it causes perf regressions on a couple of the benchmarks in our internal list.
llvm-svn: 329593
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleSLM.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleSLM.td b/llvm/lib/Target/X86/X86ScheduleSLM.td index 73eb257ad5c..a712a188aa0 100644 --- a/llvm/lib/Target/X86/X86ScheduleSLM.td +++ b/llvm/lib/Target/X86/X86ScheduleSLM.td @@ -145,7 +145,9 @@ defm : SLMWriteResPair<WriteVecShift, [SLM_FPC_RSV0], 1>; defm : SLMWriteResPair<WriteVecLogic, [SLM_FPC_RSV01], 1>; defm : SLMWriteResPair<WriteVecALU, [SLM_FPC_RSV01], 1>; defm : SLMWriteResPair<WriteVecIMul, [SLM_FPC_RSV0], 4>; -defm : SLMWriteResPair<WritePMULLD, [SLM_FPC_RSV0], 11, [11], 7>; +// FIXME: The below is closer to correct, but caused some perf regressions. +//defm : SLMWriteResPair<WritePMULLD, [SLM_FPC_RSV0], 11, [11], 7>; +defm : SLMWriteResPair<WritePMULLD, [SLM_FPC_RSV0], 4>; defm : SLMWriteResPair<WriteShuffle, [SLM_FPC_RSV0], 1>; defm : SLMWriteResPair<WriteBlend, [SLM_FPC_RSV0], 1>; defm : SLMWriteResPair<WriteMPSAD, [SLM_FPC_RSV0], 7>; |
