summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2009-10-19 23:35:57 +0000
committerChris Lattner <sabre@nondot.org>2009-10-19 23:35:57 +0000
commit0b4a59fc0797e9b8e67a7b369ded4563f53b43c4 (patch)
tree4c1ae88e9410c412bec27aec8869aa262049695d /llvm/lib
parentbd531262f8d7557fc3216e0a90159420ad1edeae (diff)
downloadbcm5719-llvm-0b4a59fc0797e9b8e67a7b369ded4563f53b43c4.tar.gz
bcm5719-llvm-0b4a59fc0797e9b8e67a7b369ded4563f53b43c4.zip
X86 should ignore implicit regs when lowering to MCInst also,
no functionality change. llvm-svn: 84567
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/llvm/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
index 5ede37bd3a7..d498c57f4c9 100644
--- a/llvm/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
@@ -306,6 +306,8 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MI->dump();
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
+ // Ignore all implicit register operands.
+ if (MO.isImplicit()) continue;
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate:
OpenPOWER on IntegriCloud