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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-18 02:15:30 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-18 02:15:30 +0000 |
| commit | 096ec1e10c1cc20cb1757206161f12dfe526ca45 (patch) | |
| tree | 32bf89a9203ed9419adcf7041a312ebf8043c890 /llvm/lib | |
| parent | 65fa1c425d7104909ad18b34086e259e789de441 (diff) | |
| download | bcm5719-llvm-096ec1e10c1cc20cb1757206161f12dfe526ca45.tar.gz bcm5719-llvm-096ec1e10c1cc20cb1757206161f12dfe526ca45.zip | |
R600/SI: Fix src1_modifiers for class instructions
src1 doesn't have modifiers, but the operand was missing
resulting in an encoding build error when all fields
are required.'
llvm-svn: 229611
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.td | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td index 3732b8e3664..00520caf818 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.td +++ b/llvm/lib/Target/R600/SIInstrInfo.td @@ -860,13 +860,24 @@ class VOP3DisableFields <bit HasSrc1, bit HasSrc2, bit HasModifiers> { bits<2> src0_modifiers = !if(HasModifiers, ?, 0); bits<2> src1_modifiers = !if(HasModifiers, !if(HasSrc1, ?, 0), 0); - bits<2> src2_modifiers = !if(HasModifiers, !if(HasSrc2, ? ,0) ,0); + bits<2> src2_modifiers = !if(HasModifiers, !if(HasSrc2, ?, 0), 0); bits<2> omod = !if(HasModifiers, ?, 0); bits<1> clamp = !if(HasModifiers, ?, 0); bits<9> src1 = !if(HasSrc1, ?, 0); bits<9> src2 = !if(HasSrc2, ?, 0); } +class VOP3DisableModFields <bit HasSrc0Mods, + bit HasSrc1Mods = 0, + bit HasSrc2Mods = 0, + bit HasOutputMods = 0> { + bits<2> src0_modifiers = !if(HasSrc0Mods, ?, 0); + bits<2> src1_modifiers = !if(HasSrc1Mods, ?, 0); + bits<2> src2_modifiers = !if(HasSrc2Mods, ?, 0); + bits<2> omod = !if(HasOutputMods, ?, 0); + bits<1> clamp = !if(HasOutputMods, ?, 0); +} + class VOP3_Pseudo <dag outs, dag ins, list<dag> pattern, string opName> : VOP3Common <outs, ins, "", pattern>, VOP <opName>, @@ -1203,6 +1214,19 @@ multiclass VOPC_Helper <vopc op, string opName, opName, HasMods, DefExec>; } +// Special case for class instructions which only have modifiers on +// the 1st source operand. +multiclass VOPC_Class_Helper <vopc op, string opName, + dag ins32, string asm32, list<dag> pat32, + dag out64, dag ins64, string asm64, list<dag> pat64, + bit HasMods, bit DefExec> { + defm _e32 : VOPC_m <op, (outs), ins32, opName#asm32, pat32, opName, DefExec>; + + defm _e64 : VOP3_C_m <op, out64, ins64, opName#"_e64"#asm64, pat64, + opName, HasMods, DefExec>, + VOP3DisableModFields<1, 0, 0>; +} + multiclass VOPCInst <vopc op, string opName, VOPProfile P, PatLeaf cond = COND_NULL, bit DefExec = 0> : VOPC_Helper < @@ -1220,7 +1244,7 @@ multiclass VOPCInst <vopc op, string opName, >; multiclass VOPCClassInst <vopc op, string opName, VOPProfile P, - bit DefExec = 0> : VOPC_Helper < + bit DefExec = 0> : VOPC_Class_Helper < op, opName, P.Ins32, P.Asm32, [], (outs SReg_64:$dst), P.Ins64, P.Asm64, |
