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| author | Dan Gohman <gohman@apple.com> | 2008-05-12 20:22:45 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-05-12 20:22:45 +0000 |
| commit | 0863b19ae63e6504076b138b022e78379070f068 (patch) | |
| tree | 2887dae6635e6560d6f9ec0a56c0d3bafba7493e /llvm/lib | |
| parent | 17c5434a16515b3362988a3e3af46ac3fd2c2fe8 (diff) | |
| download | bcm5719-llvm-0863b19ae63e6504076b138b022e78379070f068.tar.gz bcm5719-llvm-0863b19ae63e6504076b138b022e78379070f068.zip | |
Fix a copy+paste bug; pseudo-instructions shouldn't have
encoding information.
llvm-svn: 50997
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 35 |
1 files changed, 14 insertions, 21 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index af615403612..6b0a19bb4d7 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -2601,58 +2601,51 @@ def LXADD8 : I<0xC0, MRMSrcMem, (outs GR8:$dst), (ins i8mem:$ptr, GR8:$val), // Atomic exchange and and, or, xor let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { -def ATOMAND32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), +def ATOMAND32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMAND32 PSUEDO!", - [(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>, - TB, LOCK; + [(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>; } let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { -def ATOMOR32 : I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), +def ATOMOR32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMOR32 PSUEDO!", - [(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>, - TB, LOCK; + [(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>; } let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { -def ATOMXOR32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), +def ATOMXOR32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMXOR32 PSUEDO!", - [(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>, - TB, LOCK; + [(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>; } let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { -def ATOMMIN32: I<0xC1, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val), +def ATOMMIN32: I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val), "#ATOMMIN32 PSUEDO!", - [(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>, - TB, LOCK; + [(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>; } let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { -def ATOMMAX32: I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), +def ATOMMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMMAX32 PSUEDO!", - [(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>, - TB, LOCK; + [(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>; } let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { -def ATOMUMIN32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), +def ATOMUMIN32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMUMIN32 PSUEDO!", - [(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>, - TB, LOCK; + [(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>; } let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { -def ATOMUMAX32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), +def ATOMUMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMUMAX32 PSUEDO!", - [(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>, - TB, LOCK; + [(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>; } //===----------------------------------------------------------------------===// |
