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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-04-30 20:31:07 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-04-30 20:31:07 +0000 |
| commit | 07ab4e7db8d4e4fac10b039c31bc6175a7331b7e (patch) | |
| tree | 7ca71a8459bf3f9ed3f9770b6f4e29bae02fcbd8 /llvm/lib | |
| parent | 31dbbf1df911b2850f9641e2626f5e65846153e1 (diff) | |
| download | bcm5719-llvm-07ab4e7db8d4e4fac10b039c31bc6175a7331b7e.tar.gz bcm5719-llvm-07ab4e7db8d4e4fac10b039c31bc6175a7331b7e.zip | |
[X86][SSE] Fold extract_subvector(extend(x)) -> extend_vector_inreg(x)
This adds any extend support - folding to zero_extend_vector_inreg (PMOVZX) for legality
Minor improvement for PR39709
llvm-svn: 359608
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 1ed59bd7535..eedf024f680 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -42765,15 +42765,17 @@ static SDValue combineExtractSubvector(SDNode *N, SelectionDAG &DAG, return DAG.getNode(X86ISD::VFPEXT, SDLoc(N), VT, InVec.getOperand(0)); } } - if ((InOpcode == ISD::ZERO_EXTEND || InOpcode == ISD::SIGN_EXTEND) && + if ((InOpcode == ISD::ANY_EXTEND || InOpcode == ISD::ZERO_EXTEND || + InOpcode == ISD::SIGN_EXTEND) && VT.is128BitVector() && InVec.getOperand(0).getSimpleValueType().is128BitVector()) { - unsigned ExtOp = - InOpcode == ISD::ZERO_EXTEND ? ISD::ZERO_EXTEND_VECTOR_INREG - : ISD::SIGN_EXTEND_VECTOR_INREG; + unsigned ExtOp = InOpcode == ISD::SIGN_EXTEND + ? ISD::SIGN_EXTEND_VECTOR_INREG + : ISD::ZERO_EXTEND_VECTOR_INREG; return DAG.getNode(ExtOp, SDLoc(N), VT, InVec.getOperand(0)); } - if ((InOpcode == ISD::ZERO_EXTEND_VECTOR_INREG || + if ((InOpcode == ISD::ANY_EXTEND_VECTOR_INREG || + InOpcode == ISD::ZERO_EXTEND_VECTOR_INREG || InOpcode == ISD::SIGN_EXTEND_VECTOR_INREG) && VT.is128BitVector() && InVec.getOperand(0).getSimpleValueType().is128BitVector()) { |
