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authorJohnny Chen <johnny.chen@apple.com>2011-05-18 20:32:41 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-05-18 20:32:41 +0000
commit071634612d30901f1ee28ad7f06df01120b14cbe (patch)
tree8ab262d4bc32c6a61089f274231a0c10bf66ca1b /llvm/lib
parent0b373dca1f805a53d40f719ccc3a9e8b665d863c (diff)
downloadbcm5719-llvm-071634612d30901f1ee28ad7f06df01120b14cbe.tar.gz
bcm5719-llvm-071634612d30901f1ee28ad7f06df01120b14cbe.zip
Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand.
llvm-svn: 131565
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
index 8d39982f564..fbb16b936ad 100644
--- a/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
+++ b/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
@@ -957,7 +957,7 @@ static bool DisassembleThumb1CondBr(MCInst &MI, unsigned Opcode, uint32_t insn,
unsigned Imm8 = getT1Imm8(insn);
MI.addOperand(MCOperand::CreateImm(
- Opcode == ARM::tBcc ? SignExtend32<9>(Imm8 << 1) + 4
+ Opcode == ARM::tBcc ? SignExtend32<9>(Imm8 << 1)
: (int)Imm8));
// Predicate operands by ARMBasicMCBuilder::TryPredicateAndSBitModifier().
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