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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-11-05 17:43:00 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-11-05 17:43:00 +0000 |
| commit | 06c9d55123bdbb11a88b21d37d4d8d8dad7bbb30 (patch) | |
| tree | 86cd85972970e79b1909f8ed946abde7e6f1850d /llvm/lib | |
| parent | 816ef086f6419b8ed95bea22ee0e12c948c1602b (diff) | |
| download | bcm5719-llvm-06c9d55123bdbb11a88b21d37d4d8d8dad7bbb30.tar.gz bcm5719-llvm-06c9d55123bdbb11a88b21d37d4d8d8dad7bbb30.zip | |
ps][microMIPS] Implement CodeGen support for ANDI16 instruction
llvm-svn: 221371
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 5 |
2 files changed, 13 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td index b93cf6d19b6..a4393b36873 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td @@ -31,6 +31,11 @@ def uimm4_andi : Operand<i32> { let EncoderMethod = "getUImm4AndValue"; } +def immZExtAndi16 : ImmLeaf<i32, + [{return (Imm == 128 || (Imm >= 1 && Imm <= 4) || Imm == 7 || Imm == 8 || + Imm == 15 || Imm == 16 || Imm == 31 || Imm == 32 || Imm == 63 || + Imm == 64 || Imm == 255 || Imm == 32768 || Imm == 65535 );}]>; + def immZExt2Shift : ImmLeaf<i32, [{return Imm >= 1 && Imm <= 8;}]>; def immLi16 : ImmLeaf<i32, [{return Imm >= -1 && Imm <= 126;}]>; @@ -509,6 +514,11 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { // MicroMips arbitrary patterns that map to one or more instructions //===----------------------------------------------------------------------===// +def : MipsPat<(and GPRMM16:$src, immZExtAndi16:$imm), + (ANDI16_MM GPRMM16:$src, immZExtAndi16:$imm)>; +def : MipsPat<(and GPR32:$src, immZExt16:$imm), + (ANDi_MM GPR32:$src, immZExt16:$imm)>; + def : MipsPat<(shl GPRMM16:$src, immZExt2Shift:$imm), (SLL16_MM GPRMM16:$src, immZExt2Shift:$imm)>; def : MipsPat<(shl GPR32:$src, immZExt5:$imm), diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 2562034852b..c89da01a61c 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -1105,9 +1105,10 @@ def SLTi : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>, SLTI_FM<0xa>; def SLTiu : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, GPR32Opnd>, SLTI_FM<0xb>; +let AdditionalPredicates = [NotInMicroMips] in { def ANDi : MMRel, ArithLogicI<"andi", uimm16, GPR32Opnd, II_ANDI, immZExt16, - and>, - ADDI_FM<0xc>; + and>, ADDI_FM<0xc>; +} def ORi : MMRel, ArithLogicI<"ori", uimm16, GPR32Opnd, II_ORI, immZExt16, or>, ADDI_FM<0xd>; |

