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author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-11-28 08:58:27 +0000 |
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committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-11-28 08:58:27 +0000 |
commit | 06acb3a236594c93b9deefa2229d805b310c1e60 (patch) | |
tree | e9c69a19ae4bf9e247c939d6fd28ce900c42bebe /llvm/lib | |
parent | d6b7aca911bf77783b9e5f78fe0777fc874ee4ba (diff) | |
download | bcm5719-llvm-06acb3a236594c93b9deefa2229d805b310c1e60.tar.gz bcm5719-llvm-06acb3a236594c93b9deefa2229d805b310c1e60.zip |
[SystemZ::TTI] Improve cost for compare of i64 with extended i32 load
CGF/CLGF compares an i64 register with a sign/zero extended loaded i32 value
in memory.
This patch makes such a load considered foldable and so gets a 0 cost.
Review: Ulrich Weigand
https://reviews.llvm.org/D54944
llvm-svn: 347735
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp index 362d2d3c79d..32883efbdab 100644 --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp @@ -915,16 +915,19 @@ isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue) { switch (UserI->getOpcode()) { case Instruction::Add: // SE: 16->32, 16/32->64, z14:16->64. ZE: 32->64 case Instruction::Sub: + case Instruction::ICmp: if (LoadedBits == 32 && ZExtBits == 64) return true; LLVM_FALLTHROUGH; case Instruction::Mul: // SE: 16->32, 32->64, z14:16->64 - if (LoadedBits == 16 && - (SExtBits == 32 || - (SExtBits == 64 && ST->hasMiscellaneousExtensions2()))) - return true; - if (LoadOrTruncBits == 16) - return true; + if (UserI->getOpcode() != Instruction::ICmp) { + if (LoadedBits == 16 && + (SExtBits == 32 || + (SExtBits == 64 && ST->hasMiscellaneousExtensions2()))) + return true; + if (LoadOrTruncBits == 16) + return true; + } LLVM_FALLTHROUGH; case Instruction::SDiv:// SE: 32->64 if (LoadedBits == 32 && SExtBits == 64) @@ -934,7 +937,6 @@ isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue) { case Instruction::And: case Instruction::Or: case Instruction::Xor: - case Instruction::ICmp: // This also makes sense for float operations, but disabled for now due // to regressions. // case Instruction::FCmp: |