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| author | Evandro Menezes <e.menezes@samsung.com> | 2019-01-11 18:54:25 +0000 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2019-01-11 18:54:25 +0000 |
| commit | 0674762112312636db7172e4dbdc8c80b44e4fd1 (patch) | |
| tree | e37cad45f24eb1fcd297b8265be84ee1c2f1aa54 /llvm/lib | |
| parent | a61edd501832d90f868b1a8ec3940abaf7ba6bf7 (diff) | |
| download | bcm5719-llvm-0674762112312636db7172e4dbdc8c80b44e4fd1.tar.gz bcm5719-llvm-0674762112312636db7172e4dbdc8c80b44e4fd1.zip | |
[AArch64] Create feature set for Exynos M4
Complete the feature set for Exynos M4 and update test cases.
llvm-svn: 350953
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64.td | 21 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 3 |
2 files changed, 23 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 03d28303a2f..c0c710c6d0c 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -540,6 +540,25 @@ def ProcExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM3", FeaturePredictableSelectIsExpensive, FeatureZCZeroingFP]>; +def ProcExynosM4 : SubtargetFeature<"exynosm4", "ARMProcFamily", "ExynosM3", + "Samsung Exynos-M4 processors", + [HasV8_2aOps, + FeatureArithmeticBccFusion, + FeatureArithmeticCbzFusion, + FeatureCrypto, + FeatureDotProd, + FeatureExynosCheapAsMoveHandling, + FeatureForce32BitJumpTables, + FeatureFP16FML, + FeatureFuseAddress, + FeatureFuseAES, + FeatureFuseCCSelect, + FeatureFuseLiterals, + FeatureLSLFast, + FeaturePerfMon, + FeaturePostRAScheduler, + FeatureZCZeroing]>; + def ProcKryo : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo", "Qualcomm Kryo processors", [ FeatureCRC, @@ -677,7 +696,7 @@ def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>; def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>; def : ProcessorModel<"exynos-m2", ExynosM1Model, [ProcExynosM2]>; def : ProcessorModel<"exynos-m3", ExynosM3Model, [ProcExynosM3]>; -def : ProcessorModel<"exynos-m4", ExynosM3Model, [ProcExynosM3]>; +def : ProcessorModel<"exynos-m4", ExynosM3Model, [ProcExynosM4]>; def : ProcessorModel<"falkor", FalkorModel, [ProcFalkor]>; def : ProcessorModel<"saphira", FalkorModel, [ProcSaphira]>; def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>; diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index 781d613d041..5d5b4c85c7c 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -1079,6 +1079,9 @@ def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynos]>; def : ProcNoItin<"exynos-m2", [ARMv8a, ProcExynos]>; def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynos]>; def : ProcNoItin<"exynos-m4", [ARMv8a, ProcExynos]>; +def : ProcNoItin<"exynos-m4", [ARMv82a, ProcExynos, + FeatureFullFP16, + FeatureDotProd]>; def : ProcNoItin<"kryo", [ARMv8a, ProcKryo, FeatureHWDivThumb, |
