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authorOlivier Sallenave <ohsallen@us.ibm.com>2015-02-12 22:57:58 +0000
committerOlivier Sallenave <ohsallen@us.ibm.com>2015-02-12 22:57:58 +0000
commit05e69157b659b8357949d0c6d036da79dafaa4ba (patch)
tree7f39723b8b2fcf48245992c2009e52069bcb7231 /llvm/lib
parentb4a0df9a4a8a3dac612c1f6cde089d190951dc4a (diff)
downloadbcm5719-llvm-05e69157b659b8357949d0c6d036da79dafaa4ba.tar.gz
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Change max interleave factor to 12 for POWER7 and POWER8.
llvm-svn: 228973
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
index 4003b1b0812..e1d46f72542 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -226,6 +226,12 @@ unsigned PPCTTIImpl::getMaxInterleaveFactor() {
if (Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500)
return 1;
+ // For P7 and P8, floating-point instructions have a 6-cycle latency and
+ // there are two execution units, so unroll by 12x for latency hiding.
+ if (Directive == PPC::DIR_PWR7 ||
+ Directive == PPC::DIR_PWR8)
+ return 12;
+
// For most things, modern systems have two execution units (and
// out-of-order execution).
return 2;
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