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author | Craig Topper <craig.topper@intel.com> | 2017-07-26 04:31:04 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-07-26 04:31:04 +0000 |
commit | 050c9c8f83b4fc78a0057629109a1830c834fa4b (patch) | |
tree | 66ca48fcd6f0052bfc13c355b1969d5ec79361f6 /llvm/lib | |
parent | 7b05a2712a673fe7032189a142f299ded3885491 (diff) | |
download | bcm5719-llvm-050c9c8f83b4fc78a0057629109a1830c834fa4b.tar.gz bcm5719-llvm-050c9c8f83b4fc78a0057629109a1830c834fa4b.zip |
[X86] Prevent selecting masked aligned load instructions if the load should be non-temporal
Summary: The aligned load predicates don't suppress themselves if the load is non-temporal the way the unaligned predicates do. For the most part this isn't a problem because the aligned predicates are mostly used for instructions that only load the the non-temporal loads have priority over those. The exception are masked loads.
Reviewers: RKSimon, zvi
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35712
llvm-svn: 309079
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td index 8b5bbf24f6f..e7b2e6bf64c 100644 --- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -698,17 +698,20 @@ def alignedstore512 : PatFrag<(ops node:$val, node:$ptr), // Like 'load', but always requires 128-bit vector alignment. def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{ - return cast<LoadSDNode>(N)->getAlignment() >= 16; + return cast<LoadSDNode>(N)->getAlignment() >= 16 && + (!Subtarget->hasSSE41() || !cast<LoadSDNode>(N)->isNonTemporal()); }]>; // Like 'load', but always requires 256-bit vector alignment. def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{ - return cast<LoadSDNode>(N)->getAlignment() >= 32; + return cast<LoadSDNode>(N)->getAlignment() >= 32 && + (!Subtarget->hasAVX2() || !cast<LoadSDNode>(N)->isNonTemporal()); }]>; // Like 'load', but always requires 512-bit vector alignment. def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{ - return cast<LoadSDNode>(N)->getAlignment() >= 64; + return cast<LoadSDNode>(N)->getAlignment() >= 64 && + (!Subtarget->hasAVX512() || !cast<LoadSDNode>(N)->isNonTemporal()); }]>; // 128-bit aligned load pattern fragments |