Revert "[DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler."

This reverts commit r301309 which is causing buildbot assertion failures.

llvm-svn: 301312

3 files changed, 8 insertions, 23 deletions

diff --git a/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp b/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
index 3a57772cc7f..955524c2a67 100644
--- a/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
@@ -964,8 +964,10 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
               // sure to update that as well.
               const SUnit *SU = MISUnitMap[Q.second.Operand->getParent()];
               if (!SU) continue;
-              UpdateDbgValues(DbgValues, Q.second.Operand->getParent(),
-                              AntiDepReg, NewReg);
+              for (DbgValueVector::iterator DVI = DbgValues.begin(),
+                     DVE = DbgValues.end(); DVI != DVE; ++DVI)
+                if (DVI->second == Q.second.Operand->getParent())
+                  UpdateDbgValue(*DVI->first, AntiDepReg, NewReg);
             }
 
             // We just went back in time and modified history; the
diff --git a/llvm/lib/CodeGen/AntiDepBreaker.h b/llvm/lib/CodeGen/AntiDepBreaker.h
index d14d93100ad..04f7f419f5e 100644
--- a/llvm/lib/CodeGen/AntiDepBreaker.h
+++ b/llvm/lib/CodeGen/AntiDepBreaker.h
@@ -60,25 +60,6 @@ public:
     if (MI.getOperand(0).isReg() && MI.getOperand(0).getReg() == OldReg)
       MI.getOperand(0).setReg(NewReg);
   }
-
-  /// Update all DBG_VALUE instructions that may be affected by the dependency
-  /// breaker's update of ParentMI to use NewReg.
-  void UpdateDbgValues(const DbgValueVector &DbgValues, MachineInstr *ParentMI,
-                       unsigned OldReg, unsigned NewReg) {
-    // The following code is dependent on the order in which the DbgValues are
-    // constructed in ScheduleDAGInstrs::buildSchedGraph.
-    MachineInstr *PrevDbgMI = nullptr;
-    for (const auto &DV : make_range(DbgValues.crbegin(), DbgValues.crend())) {
-      MachineInstr *PrevMI = DV.second;
-      if ((PrevMI == ParentMI) || (PrevMI == PrevDbgMI)) {
-        MachineInstr *DbgMI = DV.first;
-        UpdateDbgValue(*DbgMI, OldReg, NewReg);
-        PrevDbgMI = DbgMI;
-      } else if (PrevDbgMI) {
-        break; // If no match and already found a DBG_VALUE, we're done.
-      }
-    }
-  }
 };
 
 }
diff --git a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
index b2d6652b075..e1eeddf0816 100644
--- a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
@@ -648,8 +648,10 @@ BreakAntiDependencies(const std::vector<SUnit>& SUnits,
           // as well.
           const SUnit *SU = MISUnitMap[Q->second->getParent()];
           if (!SU) continue;
-          UpdateDbgValues(DbgValues, Q->second->getParent(),
-                          AntiDepReg, NewReg);
+          for (DbgValueVector::iterator DVI = DbgValues.begin(),
+                 DVE = DbgValues.end(); DVI != DVE; ++DVI)
+            if (DVI->second == Q->second->getParent())
+              UpdateDbgValue(*DVI->first, AntiDepReg, NewReg);
         }
 
         // We just went back in time and modified history; the