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authorMichael Liao <michael.liao@intel.com>2013-11-22 17:56:57 +0000
committerMichael Liao <michael.liao@intel.com>2013-11-22 17:56:57 +0000
commit02160d580bac75f563cc346c3500221dbe0bcae4 (patch)
tree43952f144fd59cabfe7d99ecd6761c0eaefc417e /llvm/lib
parentf03789ca3f5592579484d49e5a07ebec3feb5aa2 (diff)
downloadbcm5719-llvm-02160d580bac75f563cc346c3500221dbe0bcae4.tar.gz
bcm5719-llvm-02160d580bac75f563cc346c3500221dbe0bcae4.zip
Fix PR18014
- When simplifying the mask generation for BLEND, check whether that mask is also consumed by other non-BLEND insns. If true, skip that simplification. llvm-svn: 195476
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1a15bea0d92..6c8865915da 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -17024,6 +17024,15 @@ static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG,
if (BitWidth == 1)
return SDValue();
+ // Check all uses of that condition operand to check whether it will be
+ // consumed by non-BLEND instructions, which may depend on all bits are set
+ // properly.
+ for (SDNode::use_iterator I = Cond->use_begin(),
+ E = Cond->use_end(); I != E; ++I)
+ if (I->getOpcode() != ISD::VSELECT)
+ // TODO: Add other opcodes eventually lowered into BLEND.
+ return SDValue();
+
assert(BitWidth >= 8 && BitWidth <= 64 && "Invalid mask size");
APInt DemandedMask = APInt::getHighBitsSet(BitWidth, 1);
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