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authorCraig Topper <craig.topper@gmail.com>2016-06-03 05:31:00 +0000
committerCraig Topper <craig.topper@gmail.com>2016-06-03 05:31:00 +0000
commit01f53b1773a2989711960273aa699c2a7ab4e87a (patch)
treef00e1ffa1aa4333cc086554bbb2b13fbfea74b0a /llvm/lib
parentdc70d8a4b735546f2dcb4e4a96ecc8555519d13a (diff)
downloadbcm5719-llvm-01f53b1773a2989711960273aa699c2a7ab4e87a.tar.gz
bcm5719-llvm-01f53b1773a2989711960273aa699c2a7ab4e87a.zip
[AVX512] Fix shuffle comment printing for EVEX encoded PSHUFD, PSHUFHW, and PSHUFLW.
llvm-svn: 271628
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp46
1 files changed, 17 insertions, 29 deletions
diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
index 12bfd2fdd4c..bc0c5351363 100644
--- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
+++ b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
@@ -62,13 +62,13 @@ using namespace llvm;
CASE_AVX_INS_COMMON(Inst, Y, r##src) \
CASE_SSE_INS_COMMON(Inst, r##src)
-#define CASE_SHUF(Inst, src) \
- CASE_AVX512_INS_COMMON(Inst, Z, r##src##i) \
- CASE_AVX512_INS_COMMON(Inst, Z256, r##src##i) \
- CASE_AVX512_INS_COMMON(Inst, Z128, r##src##i) \
- CASE_AVX_INS_COMMON(Inst, , r##src##i) \
- CASE_AVX_INS_COMMON(Inst, Y, r##src##i) \
- CASE_SSE_INS_COMMON(Inst, r##src##i)
+#define CASE_SHUF(Inst, suf) \
+ CASE_AVX512_INS_COMMON(Inst, Z, suf) \
+ CASE_AVX512_INS_COMMON(Inst, Z256, suf) \
+ CASE_AVX512_INS_COMMON(Inst, Z128, suf) \
+ CASE_AVX_INS_COMMON(Inst, , suf) \
+ CASE_AVX_INS_COMMON(Inst, Y, suf) \
+ CASE_SSE_INS_COMMON(Inst, suf)
#define CASE_VPERM(Inst, src) \
CASE_AVX512_INS_COMMON(Inst, Z, src##i) \
@@ -358,14 +358,10 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
ShuffleMask);
break;
- case X86::PSHUFDri:
- case X86::VPSHUFDri:
- case X86::VPSHUFDYri:
+ CASE_SHUF(PSHUFD, ri)
Src1Name = getRegName(MI->getOperand(1).getReg());
// FALL THROUGH.
- case X86::PSHUFDmi:
- case X86::VPSHUFDmi:
- case X86::VPSHUFDYmi:
+ CASE_SHUF(PSHUFD, mi)
DestName = getRegName(MI->getOperand(0).getReg());
if (MI->getOperand(NumOperands - 1).isImm())
DecodePSHUFMask(getRegOperandVectorVT(MI, MVT::i32, 0),
@@ -373,14 +369,10 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
ShuffleMask);
break;
- case X86::PSHUFHWri:
- case X86::VPSHUFHWri:
- case X86::VPSHUFHWYri:
+ CASE_SHUF(PSHUFHW, ri)
Src1Name = getRegName(MI->getOperand(1).getReg());
// FALL THROUGH.
- case X86::PSHUFHWmi:
- case X86::VPSHUFHWmi:
- case X86::VPSHUFHWYmi:
+ CASE_SHUF(PSHUFHW, mi)
DestName = getRegName(MI->getOperand(0).getReg());
if (MI->getOperand(NumOperands - 1).isImm())
DecodePSHUFHWMask(getRegOperandVectorVT(MI, MVT::i16, 0),
@@ -388,14 +380,10 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
ShuffleMask);
break;
- case X86::PSHUFLWri:
- case X86::VPSHUFLWri:
- case X86::VPSHUFLWYri:
+ CASE_SHUF(PSHUFLW, ri)
Src1Name = getRegName(MI->getOperand(1).getReg());
// FALL THROUGH.
- case X86::PSHUFLWmi:
- case X86::VPSHUFLWmi:
- case X86::VPSHUFLWYmi:
+ CASE_SHUF(PSHUFLW, mi)
DestName = getRegName(MI->getOperand(0).getReg());
if (MI->getOperand(NumOperands - 1).isImm())
DecodePSHUFLWMask(getRegOperandVectorVT(MI, MVT::i16, 0),
@@ -506,10 +494,10 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
DecodeUNPCKLMask(getRegOperandVectorVT(MI, MVT::i64, 0), ShuffleMask);
break;
- CASE_SHUF(SHUFPD, r)
+ CASE_SHUF(SHUFPD, rri)
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
- CASE_SHUF(SHUFPD, m)
+ CASE_SHUF(SHUFPD, rmi)
if (MI->getOperand(NumOperands - 1).isImm())
DecodeSHUFPMask(getRegOperandVectorVT(MI, MVT::f64, 0),
MI->getOperand(NumOperands - 1).getImm(),
@@ -518,10 +506,10 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
DestName = getRegName(MI->getOperand(0).getReg());
break;
- CASE_SHUF(SHUFPS, r)
+ CASE_SHUF(SHUFPS, rri)
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
- CASE_SHUF(SHUFPS, m)
+ CASE_SHUF(SHUFPS, rmi)
if (MI->getOperand(NumOperands - 1).isImm())
DecodeSHUFPMask(getRegOperandVectorVT(MI, MVT::f32, 0),
MI->getOperand(NumOperands - 1).getImm(),
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