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| author | Richard Osborne <richard@xmos.com> | 2012-12-17 12:26:29 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2012-12-17 12:26:29 +0000 |
| commit | 016967e4ff04db9ff9f58122d2f482ef3514e5f6 (patch) | |
| tree | e8328ed2d65a7f82378f69421435faecea880e1f /llvm/lib | |
| parent | 1cc2b68ad67e7a340379714848b679198be7adb8 (diff) | |
| download | bcm5719-llvm-016967e4ff04db9ff9f58122d2f482ef3514e5f6.tar.gz bcm5719-llvm-016967e4ff04db9ff9f58122d2f482ef3514e5f6.zip | |
Add instruction encodings / disassembly support for 0r instructions.
llvm-svn: 170322
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreInstrFormats.td | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreInstrInfo.td | 16 |
2 files changed, 12 insertions, 9 deletions
diff --git a/llvm/lib/Target/XCore/XCoreInstrFormats.td b/llvm/lib/Target/XCore/XCoreInstrFormats.td index f7fa673db81..c120240d6e2 100644 --- a/llvm/lib/Target/XCore/XCoreInstrFormats.td +++ b/llvm/lib/Target/XCore/XCoreInstrFormats.td @@ -95,8 +95,11 @@ class _F1R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> let Inst{3-0} = a; } -class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern> +class _F0R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern> : InstXCore<2, outs, ins, asmstr, pattern> { + let Inst{15-11} = opc{9-5}; + let Inst{10-5} = 0b111111; + let Inst{4-0} = opc{4-0}; } class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern> diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.td b/llvm/lib/Target/XCore/XCoreInstrInfo.td index e41c6d934ee..8254efe5382 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.td +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.td @@ -1018,31 +1018,31 @@ def EEU_1r : _F1R<0b000001, (outs), (ins GRRegs:$a), // stet, getkep, getksp, setkep, getid, kret, dcall, dret, // dentsp, drestsp -def CLRE_0R : _F0R<(outs), (ins), "clre", [(int_xcore_clre)]>; +def CLRE_0R : _F0R<0b0000001101, (outs), (ins), "clre", [(int_xcore_clre)]>; let Defs = [R11] in { -def GETID_0R : _F0R<(outs), (ins), +def GETID_0R : _F0R<0b0001001110, (outs), (ins), "get r11, id", [(set R11, (int_xcore_getid))]>; -def GETED_0R : _F0R<(outs), (ins), +def GETED_0R : _F0R<0b0000111110, (outs), (ins), "get r11, ed", [(set R11, (int_xcore_geted))]>; -def GETET_0R : _F0R<(outs), (ins), +def GETET_0R : _F0R<0b0000111111, (outs), (ins), "get r11, et", [(set R11, (int_xcore_getet))]>; } -def SSYNC_0r : _F0R<(outs), (ins), +def SSYNC_0r : _F0R<0b0000001110, (outs), (ins), "ssync", [(int_xcore_ssync)]>; let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1, hasSideEffects = 1 in -def WAITEU_0R : _F0R<(outs), (ins), - "waiteu", - [(brind (int_xcore_waitevent))]>; +def WAITEU_0R : _F0R<0b0000001100, (outs), (ins), + "waiteu", + [(brind (int_xcore_waitevent))]>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns |
