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| author | Tim Northover <tnorthover@apple.com> | 2014-10-28 01:24:32 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-10-28 01:24:32 +0000 |
| commit | 00917897b246cef0d5fa5fda28a03679788e224b (patch) | |
| tree | f92d8a144c395bbf4222d90877d2bc90b04b97a1 /llvm/lib | |
| parent | c891d8634955ead4c84b1f8c4f011b071203c5ad (diff) | |
| download | bcm5719-llvm-00917897b246cef0d5fa5fda28a03679788e224b.tar.gz bcm5719-llvm-00917897b246cef0d5fa5fda28a03679788e224b.zip | |
AArch64: enable Cortex-A57 FP balancing on Cortex-A53.
Benchmarks have shown that it's harmless to the performance there, and having a
unified set of passes between the two cores where possible helps big.LITTLE
deployment.
Patch by Z. Zheng.
llvm-svn: 220744
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp index 439bde101d9..0351284f8ee 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -251,7 +251,8 @@ bool AArch64PassConfig::addPostRegAlloc() { if (TM->getOptLevel() != CodeGenOpt::None && EnableDeadRegisterElimination) addPass(createAArch64DeadRegisterDefinitions()); if (TM->getOptLevel() != CodeGenOpt::None && - TM->getSubtarget<AArch64Subtarget>().isCortexA57() && + (TM->getSubtarget<AArch64Subtarget>().isCortexA53() || + TM->getSubtarget<AArch64Subtarget>().isCortexA57()) && usingDefaultRegAlloc()) // Improve performance for some FP/SIMD code for A57. addPass(createAArch64A57FPLoadBalancing()); |
