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authorZi Xuan Wu <wuzish@cn.ibm.com>2018-11-09 03:35:32 +0000
committerZi Xuan Wu <wuzish@cn.ibm.com>2018-11-09 03:35:32 +0000
commit71c35e13c3dc4cb267b4a5d1c736342cfc0402bf (patch)
tree00888b5f439219e2f73287c84d6aca5fe39b5ca5 /llvm/lib/XRay/RecordInitializer.cpp
parente2f6896eef8dcd1d09cf3342aa41b884b7ce9a43 (diff)
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[PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be modulo the number of bits in the element
The second parameter of vec_sr function is representing shift bits and it should be modulo the number of bits in the element like what vec_sl does now. This is actually required by the ABI: Each element of the result vector is the result of logically right shifting the corresponding element of ARG1 by the number of bits specified by the value of the corresponding element of ARG2, modulo the number of bits in the element. The bits that are shifted out are replaced by zeros. Differential Revision: https://reviews.llvm.org/D54087 llvm-svn: 346471
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