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| author | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 02:16:23 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 02:16:23 +0000 |
| commit | 2341c22ec71aed773101eef6bc725df2047e5154 (patch) | |
| tree | 453d820479bbe83769e54e01abc702ac8ef71312 /llvm/lib/VMCore | |
| parent | 48b094d9ddbca690da41f5711d8e1fcb46c50e05 (diff) | |
| download | bcm5719-llvm-2341c22ec71aed773101eef6bc725df2047e5154.tar.gz bcm5719-llvm-2341c22ec71aed773101eef6bc725df2047e5154.zip | |
Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
llvm-svn: 33776
Diffstat (limited to 'llvm/lib/VMCore')
| -rw-r--r-- | llvm/lib/VMCore/AsmWriter.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/VMCore/Constants.cpp | 37 | ||||
| -rw-r--r-- | llvm/lib/VMCore/Instructions.cpp | 9 | ||||
| -rw-r--r-- | llvm/lib/VMCore/Verifier.cpp | 29 |
4 files changed, 26 insertions, 52 deletions
diff --git a/llvm/lib/VMCore/AsmWriter.cpp b/llvm/lib/VMCore/AsmWriter.cpp index 4fe3c02324f..8a7c0987c74 100644 --- a/llvm/lib/VMCore/AsmWriter.cpp +++ b/llvm/lib/VMCore/AsmWriter.cpp @@ -1272,8 +1272,7 @@ void AssemblyWriter::printInstruction(const Instruction &I) { // Shift Left & Right print both types even for Ubyte LHS, and select prints // types even if all operands are bools. - if (isa<ShiftInst>(I) || isa<SelectInst>(I) || isa<StoreInst>(I) || - isa<ShuffleVectorInst>(I)) { + if (isa<SelectInst>(I) || isa<StoreInst>(I) || isa<ShuffleVectorInst>(I)) { PrintAllTypes = true; } else { for (unsigned i = 1, E = I.getNumOperands(); i != E; ++i) { diff --git a/llvm/lib/VMCore/Constants.cpp b/llvm/lib/VMCore/Constants.cpp index cb296ad6ab9..79673f034d3 100644 --- a/llvm/lib/VMCore/Constants.cpp +++ b/llvm/lib/VMCore/Constants.cpp @@ -1302,10 +1302,7 @@ namespace llvm { if (Instruction::isCast(V.opcode)) return new UnaryConstantExpr(V.opcode, V.operands[0], Ty); if ((V.opcode >= Instruction::BinaryOpsBegin && - V.opcode < Instruction::BinaryOpsEnd) || - V.opcode == Instruction::Shl || - V.opcode == Instruction::LShr || - V.opcode == Instruction::AShr) + V.opcode < Instruction::BinaryOpsEnd)) return new BinaryConstantExpr(V.opcode, V.operands[0], V.operands[1]); if (V.opcode == Instruction::Select) return new SelectConstantExpr(V.operands[0], V.operands[1], @@ -1362,12 +1359,6 @@ namespace llvm { OldC->getOperand(1), OldC->getOperand(2)); break; - case Instruction::Shl: - case Instruction::LShr: - case Instruction::AShr: - New = ConstantExpr::getShiftTy(NewTy, OldC->getOpcode(), - OldC->getOperand(0), OldC->getOperand(1)); - break; default: assert(OldC->getOpcode() >= Instruction::BinaryOpsBegin && OldC->getOpcode() < Instruction::BinaryOpsEnd); @@ -1603,10 +1594,6 @@ Constant *ConstantExpr::getPtrPtrFromArrayPtr(Constant *C) { Constant *ConstantExpr::getTy(const Type *ReqTy, unsigned Opcode, Constant *C1, Constant *C2) { - if (Opcode == Instruction::Shl || Opcode == Instruction::LShr || - Opcode == Instruction::AShr) - return getShiftTy(ReqTy, Opcode, C1, C2); - // Check the operands for consistency first assert(Opcode >= Instruction::BinaryOpsBegin && Opcode < Instruction::BinaryOpsEnd && @@ -1689,7 +1676,7 @@ Constant *ConstantExpr::get(unsigned Opcode, Constant *C1, Constant *C2) { case Instruction::Shl: case Instruction::LShr: case Instruction::AShr: - assert(C2->getType() == Type::Int8Ty && "Shift should be by i8!"); + assert(C1->getType() == C2->getType() && "Op types should be identical!"); assert(C1->getType()->isInteger() && "Tried to create a shift operation on a non-integer type!"); break; @@ -1724,26 +1711,6 @@ Constant *ConstantExpr::getSelectTy(const Type *ReqTy, Constant *C, return ExprConstants->getOrCreate(ReqTy, Key); } -/// getShiftTy - Return a shift left or shift right constant expr -Constant *ConstantExpr::getShiftTy(const Type *ReqTy, unsigned Opcode, - Constant *C1, Constant *C2) { - // Check the operands for consistency first - assert((Opcode == Instruction::Shl || - Opcode == Instruction::LShr || - Opcode == Instruction::AShr) && - "Invalid opcode in binary constant expression"); - assert(C1->getType()->isInteger() && C2->getType() == Type::Int8Ty && - "Invalid operand types for Shift constant expr!"); - - if (Constant *FC = ConstantFoldBinaryInstruction(Opcode, C1, C2)) - return FC; // Fold a few common cases... - - // Look up the constant in the table first to ensure uniqueness - std::vector<Constant*> argVec(1, C1); argVec.push_back(C2); - ExprMapKeyType Key(Opcode, argVec); - return ExprConstants->getOrCreate(ReqTy, Key); -} - Constant *ConstantExpr::getGetElementPtrTy(const Type *ReqTy, Constant *C, Value* const *Idxs, unsigned NumIdx) { diff --git a/llvm/lib/VMCore/Instructions.cpp b/llvm/lib/VMCore/Instructions.cpp index b4452c7a8b8..424e53e2bd1 100644 --- a/llvm/lib/VMCore/Instructions.cpp +++ b/llvm/lib/VMCore/Instructions.cpp @@ -1088,6 +1088,14 @@ void BinaryOperator::init(BinaryOps iType) cast<PackedType>(getType())->getElementType()->isFloatingPoint())) && "Incorrect operand type (not floating point) for FREM"); break; + case Shl: + case LShr: + case AShr: + assert(getType() == LHS->getType() && + "Shift operation should return same type as operands!"); + assert(getType()->isInteger() && + "Shift operation requires integer operands"); + break; case And: case Or: case Xor: assert(getType() == LHS->getType() && @@ -2299,7 +2307,6 @@ CastInst *PtrToIntInst::clone() const { return new PtrToIntInst(*this); } CastInst *IntToPtrInst::clone() const { return new IntToPtrInst(*this); } CastInst *BitCastInst::clone() const { return new BitCastInst(*this); } CallInst *CallInst::clone() const { return new CallInst(*this); } -ShiftInst *ShiftInst::clone() const { return new ShiftInst(*this); } SelectInst *SelectInst::clone() const { return new SelectInst(*this); } VAArgInst *VAArgInst::clone() const { return new VAArgInst(*this); } diff --git a/llvm/lib/VMCore/Verifier.cpp b/llvm/lib/VMCore/Verifier.cpp index 59be4a45a33..9dc892e5aef 100644 --- a/llvm/lib/VMCore/Verifier.cpp +++ b/llvm/lib/VMCore/Verifier.cpp @@ -196,7 +196,6 @@ namespace { // Anonymous namespace for class void visitBinaryOperator(BinaryOperator &B); void visitICmpInst(ICmpInst &IC); void visitFCmpInst(FCmpInst &FC); - void visitShiftInst(ShiftInst &SI); void visitExtractElementInst(ExtractElementInst &EI); void visitInsertElementInst(InsertElementInst &EI); void visitShuffleVectorInst(ShuffleVectorInst &EI); @@ -713,9 +712,11 @@ void Verifier::visitBinaryOperator(BinaryOperator &B) { Assert1(B.getOperand(0)->getType() == B.getOperand(1)->getType(), "Both operands to a binary operator are not of the same type!", &B); + switch (B.getOpcode()) { // Check that logical operators are only used with integral operands. - if (B.getOpcode() == Instruction::And || B.getOpcode() == Instruction::Or || - B.getOpcode() == Instruction::Xor) { + case Instruction::And: + case Instruction::Or: + case Instruction::Xor: Assert1(B.getType()->isInteger() || (isa<PackedType>(B.getType()) && cast<PackedType>(B.getType())->getElementType()->isInteger()), @@ -723,7 +724,16 @@ void Verifier::visitBinaryOperator(BinaryOperator &B) { Assert1(B.getType() == B.getOperand(0)->getType(), "Logical operators must have same type for operands and result!", &B); - } else { + break; + case Instruction::Shl: + case Instruction::LShr: + case Instruction::AShr: + Assert1(B.getType()->isInteger(), + "Shift must return an integer result!", &B); + Assert1(B.getType() == B.getOperand(0)->getType(), + "Shift return type must be same as operands!", &B); + /* FALL THROUGH */ + default: // Arithmetic operators only work on integer or fp values Assert1(B.getType() == B.getOperand(0)->getType(), "Arithmetic operators must have same type for operands and result!", @@ -731,6 +741,7 @@ void Verifier::visitBinaryOperator(BinaryOperator &B) { Assert1(B.getType()->isInteger() || B.getType()->isFloatingPoint() || isa<PackedType>(B.getType()), "Arithmetic operators must have integer, fp, or packed type!", &B); + break; } visitInstruction(B); @@ -760,16 +771,6 @@ void Verifier::visitFCmpInst(FCmpInst& FC) { visitInstruction(FC); } -void Verifier::visitShiftInst(ShiftInst &SI) { - Assert1(SI.getType()->isInteger(), - "Shift must return an integer result!", &SI); - Assert1(SI.getType() == SI.getOperand(0)->getType(), - "Shift return type must be same as first operand!", &SI); - Assert1(SI.getOperand(1)->getType() == Type::Int8Ty, - "Second operand to shift must be ubyte type!", &SI); - visitInstruction(SI); -} - void Verifier::visitExtractElementInst(ExtractElementInst &EI) { Assert1(ExtractElementInst::isValidOperands(EI.getOperand(0), EI.getOperand(1)), |

