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| author | Reid Spencer <rspencer@reidspencer.com> | 2006-11-02 01:53:59 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2006-11-02 01:53:59 +0000 |
| commit | 7eb55b395fdbbdbd113aabb6cad51cc98b379af0 (patch) | |
| tree | 2666f67e03e73fc890b7277073186b32ead86d50 /llvm/lib/VMCore/Instruction.cpp | |
| parent | 57382066e875c05e58f35db5976a22ed5dcdebf8 (diff) | |
| download | bcm5719-llvm-7eb55b395fdbbdbd113aabb6cad51cc98b379af0.tar.gz bcm5719-llvm-7eb55b395fdbbdbd113aabb6cad51cc98b379af0.zip | |
For PR950:
Replace the REM instruction with UREM, SREM and FREM.
llvm-svn: 31369
Diffstat (limited to 'llvm/lib/VMCore/Instruction.cpp')
| -rw-r--r-- | llvm/lib/VMCore/Instruction.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/VMCore/Instruction.cpp b/llvm/lib/VMCore/Instruction.cpp index 9b5fa714ea0..355c508b6a6 100644 --- a/llvm/lib/VMCore/Instruction.cpp +++ b/llvm/lib/VMCore/Instruction.cpp @@ -97,7 +97,9 @@ const char *Instruction::getOpcodeName(unsigned OpCode) { case UDiv: return "udiv"; case SDiv: return "sdiv"; case FDiv: return "fdiv"; - case Rem: return "rem"; + case URem: return "urem"; + case SRem: return "srem"; + case FRem: return "frem"; // Logical operators... case And: return "and"; @@ -227,7 +229,9 @@ bool Instruction::isTrapping(unsigned op) { case UDiv: case SDiv: case FDiv: - case Rem: + case URem: + case SRem: + case FRem: case Load: case Store: case Call: |
