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| author | Reid Spencer <rspencer@reidspencer.com> | 2006-10-26 06:15:43 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2006-10-26 06:15:43 +0000 |
| commit | 7e80b0b31ef448877c60de9b3d518a2a79c0a8a7 (patch) | |
| tree | 12ea272f456d91b5260218887fe5d8c257bb807a /llvm/lib/VMCore/Instruction.cpp | |
| parent | 5b979ae531ed5fd89f648b528f924b547df591b8 (diff) | |
| download | bcm5719-llvm-7e80b0b31ef448877c60de9b3d518a2a79c0a8a7.tar.gz bcm5719-llvm-7e80b0b31ef448877c60de9b3d518a2a79c0a8a7.zip | |
For PR950:
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
llvm-svn: 31195
Diffstat (limited to 'llvm/lib/VMCore/Instruction.cpp')
| -rw-r--r-- | llvm/lib/VMCore/Instruction.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/VMCore/Instruction.cpp b/llvm/lib/VMCore/Instruction.cpp index b2951461d7c..c5e8e303545 100644 --- a/llvm/lib/VMCore/Instruction.cpp +++ b/llvm/lib/VMCore/Instruction.cpp @@ -94,7 +94,9 @@ const char *Instruction::getOpcodeName(unsigned OpCode) { case Add: return "add"; case Sub: return "sub"; case Mul: return "mul"; - case Div: return "div"; + case UDiv: return "udiv"; + case SDiv: return "sdiv"; + case FDiv: return "fdiv"; case Rem: return "rem"; // Logical operators... @@ -221,7 +223,9 @@ bool Instruction::isComparison(unsigned op) { /// bool Instruction::isTrapping(unsigned op) { switch(op) { - case Div: + case UDiv: + case SDiv: + case FDiv: case Rem: case Load: case Store: |
