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| author | Eli Friedman <eli.friedman@gmail.com> | 2011-08-09 23:02:53 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-08-09 23:02:53 +0000 |
| commit | 59b66883eacbc62a09c09f08bcbfdce7af46cf31 (patch) | |
| tree | 94bf465b6c6ec54c89d295d0422be1d6cc3613c6 /llvm/lib/VMCore/AsmWriter.cpp | |
| parent | e95fcf7860d7de015a4fd2b41eb785340c32f875 (diff) | |
| download | bcm5719-llvm-59b66883eacbc62a09c09f08bcbfdce7af46cf31.tar.gz bcm5719-llvm-59b66883eacbc62a09c09f08bcbfdce7af46cf31.zip | |
Representation of 'atomic load' and 'atomic store' in IR.
llvm-svn: 137170
Diffstat (limited to 'llvm/lib/VMCore/AsmWriter.cpp')
| -rw-r--r-- | llvm/lib/VMCore/AsmWriter.cpp | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/llvm/lib/VMCore/AsmWriter.cpp b/llvm/lib/VMCore/AsmWriter.cpp index 442e8b8f7f9..005f51aae30 100644 --- a/llvm/lib/VMCore/AsmWriter.cpp +++ b/llvm/lib/VMCore/AsmWriter.cpp @@ -1659,14 +1659,18 @@ void AssemblyWriter::printInstruction(const Instruction &I) { Out << '%' << SlotNum << " = "; } + // If this is an atomic load or store, print out the atomic marker. + if ((isa<LoadInst>(I) && cast<LoadInst>(I).isAtomic()) || + (isa<StoreInst>(I) && cast<StoreInst>(I).isAtomic())) + Out << "atomic "; + // If this is a volatile load or store, print out the volatile marker. if ((isa<LoadInst>(I) && cast<LoadInst>(I).isVolatile()) || - (isa<StoreInst>(I) && cast<StoreInst>(I).isVolatile())) { - Out << "volatile "; - } else if (isa<CallInst>(I) && cast<CallInst>(I).isTailCall()) { - // If this is a call, check if it's a tail call. + (isa<StoreInst>(I) && cast<StoreInst>(I).isVolatile())) + Out << "volatile "; + + if (isa<CallInst>(I) && cast<CallInst>(I).isTailCall()) Out << "tail "; - } // Print out the opcode... Out << I.getOpcodeName(); @@ -1913,11 +1917,17 @@ void AssemblyWriter::printInstruction(const Instruction &I) { } } - // Print post operand alignment for load/store. - if (isa<LoadInst>(I) && cast<LoadInst>(I).getAlignment()) { - Out << ", align " << cast<LoadInst>(I).getAlignment(); - } else if (isa<StoreInst>(I) && cast<StoreInst>(I).getAlignment()) { - Out << ", align " << cast<StoreInst>(I).getAlignment(); + // Print atomic ordering/alignment for memory operations + if (const LoadInst *LI = dyn_cast<LoadInst>(&I)) { + if (LI->isAtomic()) + writeAtomic(LI->getOrdering(), LI->getSynchScope()); + if (LI->getAlignment()) + Out << ", align " << LI->getAlignment(); + } else if (const StoreInst *SI = dyn_cast<StoreInst>(&I)) { + if (SI->isAtomic()) + writeAtomic(SI->getOrdering(), SI->getSynchScope()); + if (SI->getAlignment()) + Out << ", align " << SI->getAlignment(); } else if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(&I)) { writeAtomic(CXI->getOrdering(), CXI->getSynchScope()); } else if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(&I)) { |

