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authorCraig Topper <craig.topper@intel.com>2017-08-02 21:05:40 +0000
committerCraig Topper <craig.topper@intel.com>2017-08-02 21:05:40 +0000
commitfc9bf50dee23cd30948509a428648c01bd000b63 (patch)
treed5e10a53f0daa3b0b7f2c66571a157d5c29cd55e /llvm/lib/Transforms
parentecd901314d48f0b525dce73c4d07919acc194696 (diff)
downloadbcm5719-llvm-fc9bf50dee23cd30948509a428648c01bd000b63.tar.gz
bcm5719-llvm-fc9bf50dee23cd30948509a428648c01bd000b63.zip
[InstCombine] Remove unnecessary temporary APInt. NFCI
llvm-svn: 309887
Diffstat (limited to 'llvm/lib/Transforms')
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp7
1 files changed, 1 insertions, 6 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 3611b1fc066..d55d74883da 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -527,11 +527,6 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
Known.Zero.lshrInPlace(ShiftAmt);
Known.One.lshrInPlace(ShiftAmt);
- // Handle the sign bits.
- APInt SignMask(APInt::getSignMask(BitWidth));
- // Adjust to where it is now in the mask.
- SignMask.lshrInPlace(ShiftAmt);
-
// If the input sign bit is known to be zero, or if none of the top bits
// are demanded, turn this into an unsigned shift right.
assert(BitWidth > ShiftAmt && "Shift amount not saturated?");
@@ -541,7 +536,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
I->getOperand(1));
LShr->setIsExact(cast<BinaryOperator>(I)->isExact());
return InsertNewInstWith(LShr, *I);
- } else if (Known.One.intersects(SignMask)) { // New bits are known one.
+ } else if (Known.One[BitWidth-ShiftAmt-1]) { // New bits are known one.
Known.One |= HighBits;
}
}
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