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| author | Sanjay Patel <spatel@rotateright.com> | 2018-01-17 14:39:28 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-01-17 14:39:28 +0000 |
| commit | aa766efd09f759758686b31571ca50ad59c62ca4 (patch) | |
| tree | ee6994775dd552d7812595af8837f4f4e948539b /llvm/lib/Transforms | |
| parent | 10d95c53af3d30cd362ab798c51cdaaaac325c89 (diff) | |
| download | bcm5719-llvm-aa766efd09f759758686b31571ca50ad59c62ca4.tar.gz bcm5719-llvm-aa766efd09f759758686b31571ca50ad59c62ca4.zip | |
[InstCombine] fix demanded-bits propagation for zext/trunc
I was comparing the demanded-bits implementations between InstCombine
and TargetLowering as part of investigating questions in D42088 and
noticed that this was wrong in IR. We were losing all of the prior
known bits when we got back to the 'zext'.
llvm-svn: 322662
Diffstat (limited to 'llvm/lib/Transforms')
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index a2e757cb427..73746bfda44 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -333,7 +333,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask, KnownBits InputKnown(SrcBitWidth); if (SimplifyDemandedBits(I, 0, InputDemandedMask, InputKnown, Depth + 1)) return I; - Known = Known.zextOrTrunc(BitWidth); + Known = InputKnown.zextOrTrunc(BitWidth); // Any top bits are known to be zero. if (BitWidth > SrcBitWidth) Known.Zero.setBitsFrom(SrcBitWidth); |

