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authorNikolai Bozhenov <nikolai.bozhenov@intel.com>2017-08-04 12:22:17 +0000
committerNikolai Bozhenov <nikolai.bozhenov@intel.com>2017-08-04 12:22:17 +0000
commit1545eb34086af1c93d6ef20dd0f07cf2849542ae (patch)
tree71b23b4d2d2fea87483a5bf9f9aa87a35264077c /llvm/lib/Transforms
parentbdd32609d4fec788023db550975c8e1ff41992fb (diff)
downloadbcm5719-llvm-1545eb34086af1c93d6ef20dd0f07cf2849542ae.tar.gz
bcm5719-llvm-1545eb34086af1c93d6ef20dd0f07cf2849542ae.zip
[InstCombine] Canonicalize clamp of float types to minmax in fast mode.
Summary: This commit allows matchSelectPattern to recognize clamp of float arguments in the presence of FMF the same way as already done for integers. This case is a little different though. With integers, given the min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX "automatically". That is not the case for float, because for them only full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care about NaNs. On the other hand, some backends (e.g. X86) have only FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM nodes are illegal thus selection is not happening. So I decided to do such kind of transformation in IR (InstCombiner) instead of complicating the logic in the backend. Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper Reviewed By: efriedma Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits Patch by Andrei Elovikov <andrei.elovikov@intel.com> Differential Revision: https://reviews.llvm.org/D33186 llvm-svn: 310054
Diffstat (limited to 'llvm/lib/Transforms')
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp24
1 files changed, 17 insertions, 7 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 7ea00e0b163..0abff6b9268 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -1389,9 +1389,17 @@ Instruction *InstCombiner::visitSelectInst(SelectInst &SI) {
auto SPF = SPR.Flavor;
if (SelectPatternResult::isMinOrMax(SPF)) {
- // Canonicalize so that type casts are outside select patterns.
- if (LHS->getType()->getPrimitiveSizeInBits() !=
- SelType->getPrimitiveSizeInBits()) {
+ // Canonicalize so that
+ // - type casts are outside select patterns.
+ // - float clamp is transformed to min/max pattern
+
+ bool IsCastNeeded = LHS->getType() != SelType;
+ Value *CmpLHS = cast<CmpInst>(CondVal)->getOperand(0);
+ Value *CmpRHS = cast<CmpInst>(CondVal)->getOperand(1);
+ if (IsCastNeeded ||
+ (LHS->getType()->isFPOrFPVectorTy() &&
+ ((CmpLHS != LHS && CmpLHS != RHS) ||
+ (CmpRHS != LHS && CmpRHS != RHS)))) {
CmpInst::Predicate Pred = getCmpPredicateForMinMax(SPF, SPR.Ordered);
Value *Cmp;
@@ -1404,10 +1412,12 @@ Instruction *InstCombiner::visitSelectInst(SelectInst &SI) {
Cmp = Builder.CreateFCmp(Pred, LHS, RHS);
}
- Value *NewSI = Builder.CreateCast(
- CastOp, Builder.CreateSelect(Cmp, LHS, RHS, SI.getName(), &SI),
- SelType);
- return replaceInstUsesWith(SI, NewSI);
+ Value *NewSI = Builder.CreateSelect(Cmp, LHS, RHS, SI.getName(), &SI);
+ if (!IsCastNeeded)
+ return replaceInstUsesWith(SI, NewSI);
+
+ Value *NewCast = Builder.CreateCast(CastOp, NewSI, SelType);
+ return replaceInstUsesWith(SI, NewCast);
}
}
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